← Commit history

ncp1252edr2g: factory component page (tier=lcsc)

Ray ·28bcb66176 · ·parent 55358b6
1 file changed +116−8
page.json+116−8
@@ -1,13 +1,126 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "ncp1252edr2g",+  "title": "NCP1252EDR2G",+  "brief": "onsemi AC-DC Controllers and Regulators, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "onsemi AC-DC Controllers and Regulators, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "pmic",     "ncp1252edr2g"   ],+  "component": {+    "mpn": "NCP1252EDR2G",+    "manufacturer": "onsemi",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "PMIC",+    "subcategory": "AC-DC Controllers and Regulators",+    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2210201930_onsemi-NCP1252EDR2G_C904430.pdf",+    "parts": {+      "symbol": "ncp1252edr2g.kicad_sym",+      "footprint": "ncp1252edr2g.kicad_mod",+      "model_3d": "ncp1252edr2g.glb",+      "model_3d_step": "ncp1252edr2g.step",+      "lbr": "ncp1252edr2g.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "FB",+        "type": "input",+        "description": "Feedback input. Directly connects to an optocoupler collector. Internally pulled up (~3.5 k\u03a9) to Vdd; the FB voltage is divided by 3 to form the current setpoint (VILIM = 1 V). Max FB current 1.5 mA."+      },+      {+        "number": "2",+        "name": "BO",+        "type": "input",+        "description": "Brown-Out input. Monitors an image of the input bulk voltage via a resistor divider to provide brown-out protection. Threshold VBO = 1 V typ; internal 10 \u00b5A hysteresis current source."+      },+      {+        "number": "3",+        "name": "CS",+        "type": "input",+        "description": "Current Sense input. Monitors the primary MOSFET current through a sense resistor and sets the ramp-compensation amplitude. Cycle-by-cycle limit VILIM = 1 V; fault threshold FCS = 1 V; 160 ns leading-edge blanking; internal ramp comp Rramp \u2248 26.5 k\u03a9."+      },+      {+        "number": "4",+        "name": "RT",+        "type": "passive",+        "description": "Timing element. A resistor to ground fixes the switching frequency (RT = 43 k\u03a9 \u2192 fOSC \u2248 100 kHz; RT = 8.5 k\u03a9 \u2192 fOSC \u2248 500 kHz). Frequency is jittered \u00b15% at 3.33 ms period."+      },+      {+        "number": "5",+        "name": "GND",+        "type": "power_in",+        "description": "Controller ground reference pin."+      },+      {+        "number": "6",+        "name": "DRV",+        "type": "output",+        "description": "Gate driver output to the external power MOSFET. +500 mA source / -800 mA sink capability; source resistance 10 \u03a9 typ, sink 6 \u03a9 typ; clamped at 15 V typ (max 18 V) to protect the MOSFET gate."+      },+      {+        "number": "7",+        "name": "VCC",+        "type": "power_in",+        "description": "Main supply pin. Operating range 8 V to 28 V (30 V transient <10 ms for IVCC<20 mA). For the E version, VCC(on) \u2248 14 V, VCC(off) \u2248 9 V with 5 V hysteresis (auto-recovery UVLO). Max injected current 20 mA."+      },+      {+        "number": "8",+        "name": "SSTART",+        "type": "passive",+        "description": "Soft-start pin. A capacitor to ground sets the soft-start duration (charge current ISS = 10 \u00b5A typ, VSS = 4 V). The pin is held to ground during the internal start-up delay timer (no delay for E version)."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2210201930_onsemi-NCP1252EDR2G_C904430.pdf",+        "pages": 22,+        "sha256": "5eceb5f0fc9b12f2",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "onsemi",+      "Package": "SOIC-8",+      "Category": "PMIC",+      "Pins": "8"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "ncp1252edr2g"+  ],+  "discovery_pitch": "NCP1252EDR2G (onsemi) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +138,5 @@     "docs/ncp1252edr2g-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file