← Commit history

orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C457618). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.

Ray ·90207a3852 · ·parent a00be2d
2 files changed +29−9
nc7wz04p6x.lbr+20−2
@@ -60,6 +60,18 @@   <smd name="4" x="0.8375" y="-0.6500" dx="1.0250" dy="0.3500" layer="1"/>   <smd name="5" x="0.8375" y="-0.0000" dx="1.0250" dy="0.3500" layer="1"/>   <smd name="6" x="0.8375" y="0.6500" dx="1.0250" dy="0.3500" layer="1"/>+  <polygon width="0.1200" layer="21">+    <vertex x="-1.1800" y="1.0900"/>+    <vertex x="-1.3200" y="1.2800"/>+    <vertex x="-1.0400" y="1.2800"/>+  </polygon>+  <polygon width="0.1000" layer="51">+    <vertex x="-0.3125" y="1.0000"/>+    <vertex x="0.6250" y="1.0000"/>+    <vertex x="0.6250" y="-1.0000"/>+    <vertex x="-0.6250" y="-1.0000"/>+    <vertex x="-0.6250" y="0.6875"/>+  </polygon>   <wire x1="-0.7350" y1="1.1100" x2="0.7350" y2="1.1100" width="0.1200" layer="21"/>   <wire x1="-0.7350" y1="1.0850" x2="-0.7350" y2="1.1100" width="0.1200" layer="21"/>   <wire x1="-0.7350" y1="-1.1100" x2="-0.7350" y2="-1.0850" width="0.1200" layer="21"/>@@ -68,7 +80,7 @@   <wire x1="0.7350" y1="-1.1100" x2="-0.7350" y2="-1.1100" width="0.1200" layer="21"/>   <text x="0" y="1.763" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-1.763" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-1.1800" y="1.0900"/><vertex x="-1.3200" y="1.2800"/><vertex x="-1.0400" y="1.2800"/></polygon></package>+</package> </packages> <symbols> <symbol name="NC7WZ04P6X">@@ -102,7 +114,13 @@         <connect gate="G$1" pin="VCC" pad="5"/>         <connect gate="G$1" pin="Y2" pad="4"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="NC7WZ04P6X" constant="no"/>+          <attribute name="MANUFACTURER" value="onsemi" constant="no"/>+          <attribute name="LCSC_PN" value="C457618" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>
page.json+9−7
@@ -26,43 +26,45 @@       "model_3d_step": "nc7wz04p6x.step",       "lbr": "nc7wz04p6x.lbr"     },-    "distributor_links": {},+    "distributor_links": {+      "lcsc": "C457618"+    },     "pins": [       {         "number": "1",         "name": "A1",         "type": "input",-        "description": "Inverter 1 logic input. CMOS input with VIH = 0.70*VCC (min) at VCC ≥ 2.3 V and 0.65*VCC (min) at 1.65-1.95 V; VIL = 0.30*VCC (max) at VCC ≥ 2.3 V. Input leakage ±1 uA. Tolerates up to 5.5 V independent of VCC."+        "description": "Inverter 1 logic input. CMOS input with VIH = 0.70*VCC (min) at VCC \u2265 2.3 V and 0.65*VCC (min) at 1.65-1.95 V; VIL = 0.30*VCC (max) at VCC \u2265 2.3 V. Input leakage \u00b11 uA. Tolerates up to 5.5 V independent of VCC."       },       {         "number": "2",         "name": "GND",         "type": "power_in",-        "description": "Ground reference (0 V). DC ground current rating ±100 mA absolute maximum."+        "description": "Ground reference (0 V). DC ground current rating \u00b1100 mA absolute maximum."       },       {         "number": "3",         "name": "A2",         "type": "input",-        "description": "Inverter 2 logic input. Same CMOS thresholds as A1 (VIH = 0.70*VCC min for VCC ≥ 2.3 V). 5.5 V input tolerant independent of VCC. Unused inputs must be tied HIGH or LOW; may not float."+        "description": "Inverter 2 logic input. Same CMOS thresholds as A1 (VIH = 0.70*VCC min for VCC \u2265 2.3 V). 5.5 V input tolerant independent of VCC. Unused inputs must be tied HIGH or LOW; may not float."       },       {         "number": "4",         "name": "Y2",         "type": "output",-        "description": "Inverter 2 logic output (Y2 = /A2). Push-pull CMOS output; guaranteed ±24 mA drive at 3 V VCC and up to ±32 mA at 4.5 V VCC. Output goes to high-impedance when VCC = 0 (power-down high-Z)."+        "description": "Inverter 2 logic output (Y2 = /A2). Push-pull CMOS output; guaranteed \u00b124 mA drive at 3 V VCC and up to \u00b132 mA at 4.5 V VCC. Output goes to high-impedance when VCC = 0 (power-down high-Z)."       },       {         "number": "5",         "name": "VCC",         "type": "power_in",-        "description": "Positive supply voltage, 1.65 V to 5.50 V operating (1.5 V to 5.5 V for data retention). Absolute max 6.5 V. Quiescent ICC ≤ 10 uA over temperature. Bypass with a local decoupling capacitor."+        "description": "Positive supply voltage, 1.65 V to 5.50 V operating (1.5 V to 5.5 V for data retention). Absolute max 6.5 V. Quiescent ICC \u2264 10 uA over temperature. Bypass with a local decoupling capacitor."       },       {         "number": "6",         "name": "Y1",         "type": "output",-        "description": "Inverter 1 logic output (Y1 = /A1). Push-pull CMOS output; ±24 mA drive at 3 V VCC. VOH ≥ VCC-0.1 V and VOL ≤ 0.1 V under light load (±100 uA)."+        "description": "Inverter 1 logic output (Y1 = /A1). Push-pull CMOS output; \u00b124 mA drive at 3 V VCC. VOH \u2265 VCC-0.1 V and VOL \u2264 0.1 V under light load (\u00b1100 uA)."       }     ],     "provenance": {