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MUN5113DW1T1G
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onsemi Digital Transistors, SOT-363. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.md+80docs/hero.pngdocs/mun5113dw1t1g-datasheet.pdf+4945mun5113dw1t1g-etched.glbmun5113dw1t1g-hero.glbmun5113dw1t1g-hero.overlay.json+216mun5113dw1t1g.glbmun5113dw1t1g.kicad_mod+288mun5113dw1t1g.kicad_sym+37mun5113dw1t1g.lbr+124mun5113dw1t1g.step+2426package.json+180page.json+186viewers/footprint.html+1viewers/symbol.html+1README.mdadded+80@@ -0,0 +1,80 @@+# MUN5113DW1T1G++**onsemi** · Digital Transistors · SOT-363++MUN5113DW1T1G from onsemi, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | EMITTER 2 | passive | Emitter of the second PNP bias resistor transistor (Q2), with the 47 k base-emitter resistor R2 integrated across base and emitter; maximum ratings are common to Q1 and Q2, with VCEO 50 Vdc and continuous IC 100 mAdc. |+| 2 | BASE 2 | passive | Base of Q2 connected to its integrated 47 k series input resistor R1 (typical 47 k, range 32.9 k to 61.1 k); input forward voltage is rated 40 Vdc and input reverse voltage 10 Vdc. |+| 3 | COLLECTOR 1 | passive | Collector of the first PNP bias resistor transistor (Q1); maximum VCBO and VCEO are 50 Vdc and continuous collector current is 100 mAdc. |+| 4 | EMITTER 1 | passive | Emitter of the first PNP bias resistor transistor (Q1), with the 47 k base-emitter resistor R2 integrated across base and emitter. |+| 5 | BASE 1 | passive | Base of Q1 connected to its integrated 47 k series input resistor R1 (typical 47 k, range 32.9 k to 61.1 k); input forward voltage is rated 40 Vdc and input reverse voltage 10 Vdc. |+| 6 | COLLECTOR 2 | passive | Collector of the second PNP bias resistor transistor (Q2); maximum VCBO and VCEO are 50 Vdc and continuous collector current is 100 mAdc. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOT-363 |+| Category | Transistors/Thyristors |+| Pins | 6 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| Collector-Base Cutoff Current | ICBO | | | 100 | nAdc | VCB = 50 V, IE = 0 | 3 |+| Collector-Emitter Cutoff Current | ICEO | | | 500 | nAdc | VCE = 50 V, IB = 0 | 3 |+| Emitter-Base Cutoff Current | IEBO | | | 0.1 | mAdc | VEB = 6.0 V, IC = 0 | 3 |+| Collector-Base Breakdown Voltage | V(BR)CBO | 50 | | | Vdc | IC = 10 A, IE = 0 | 3 |+| Collector-Emitter Breakdown Voltage | V(BR)CEO | 50 | | | Vdc | IC = 2.0 mA, IB = 0; Note 6 pulsed | 3 |+| DC Current Gain | hFE | 80 | 140 | | | IC = 5.0 mA, VCE = 10 V; Note 6 pulsed | 3 |+| Collector-Emitter Saturation Voltage | VCE(sat) | | | 0.25 | Vdc | IC = 10 mA, IB = 0.3 mA; Note 6 pulsed | 3 |+| Output Voltage (on) | VOL | | | 0.2 | Vdc | VCC = 5.0 V, VB = 3.5 V, RL = 1.0 k | 3 |+| Output Voltage (off) | VOH | 4.9 | | | Vdc | VCC = 5.0 V, VB = 0.5 V, RL = 1.0 k | 3 |+| Input Resistor R1 | R1 | 32.9 | 47 | 61.1 | k | | 3 |+| Resistor Ratio | R1/R2 | 0.8 | 1 | 1.2 | | | 3 |+| Collector-Base Voltage | VCBO | | | 50 | Vdc | TA = 25°C, common for Q1 and Q2 | 1 |+| Collector-Emitter Voltage | VCEO | | | 50 | Vdc | TA = 25°C, common for Q1 and Q2 | 1 |+| Collector Current - Continuous | IC | | | 100 | mAdc | TA = 25°C, common for Q1 and Q2 | 1 |+| Input Forward Voltage | VIN(fwd) | | | 40 | Vdc | TA = 25°C, common for Q1 and Q2 | 1 |+| Input Reverse Voltage | VIN(rev) | | | 10 | Vdc | TA = 25°C, common for Q1 and Q2 | 1 |+| Total Device Dissipation, one junction heated | PD | | | 187 | mW | TA = 25°C; Note 1 (FR-4 @ minimum pad) | 2 |+| Total Device Dissipation, one junction heated | PD | | | 256 | mW | TA = 25°C; Note 2 (FR-4 @ 1.0 x 1.0 inch pad) | 2 |+| Derate above 25°C, one junction heated | PD | | | 1.5 | mW/°C | Note 1 (FR-4 @ minimum pad) | 2 |+| Derate above 25°C, one junction heated | PD | | | 2 | mW/°C | Note 2 (FR-4 @ 1.0 x 1.0 inch pad) | 2 |+| Thermal Resistance, Junction to Ambient, one junction heated | RJA | | | 670 | °C/W | Note 1 (FR-4 @ minimum pad) | 2 |+| Thermal Resistance, Junction to Ambient, one junction heated | RJA | | | 490 | °C/W | Note 2 (FR-4 @ 1.0 x 1.0 inch pad) | 2 |+| Total Device Dissipation, both junctions heated | PD | | | 250 | mW | TA = 25°C; Note 1 (FR-4 @ minimum pad); Note 3 | 2 |+| Total Device Dissipation, both junctions heated | PD | | | 385 | mW | TA = 25°C; Note 2 (FR-4 @ 1.0 x 1.0 inch pad); Note 3 | 2 |+| Derate above 25°C, both junctions heated | PD | | | 2 | mW/°C | Note 1 (FR-4 @ minimum pad); Note 3 | 2 |+| Derate above 25°C, both junctions heated | PD | | | 3 | mW/°C | Note 2 (FR-4 @ 1.0 x 1.0 inch pad); Note 3 | 2 |+| Thermal Resistance, Junction to Ambient, both junctions heated | RJA | | | 493 | °C/W | Note 1 (FR-4 @ minimum pad); Note 3 | 2 |+| Thermal Resistance, Junction to Ambient, both junctions heated | RJA | | | 325 | °C/W | Note 2 (FR-4 @ 1.0 x 1.0 inch pad); Note 3 | 2 |+| Thermal Resistance, Junction to Lead | RJL | | | 188 | °C/W | Note 1 (FR-4 @ minimum pad) | 2 |+| Thermal Resistance, Junction to Lead | RJL | | | 208 | °C/W | Note 2 (FR-4 @ 1.0 x 1.0 inch pad) | 2 |+| Junction and Storage Temperature Range | TJ, Tstg | -55 | | 150 | °C | | 2 |++## CAD (KiCad official)++- Symbol: `MUN5113DW1T1G`+- Footprint: `Package_TO_SOT_SMD:SOT-363_SC-70-6`+- 3D model: SOT-363 (KiCad packages3D, STEP)+- 3D model files: `mun5113dw1t1g-etched.step` / `mun5113dw1t1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mun5113dw1t1g.step` / `mun5113dw1t1g.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586203076881756160) (11 pp, sha256 `2940a03d96dfd876`, retrieved 2026-10-18, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/mun5113dw1t1g-datasheet.pdf)
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The use of a BRT can reduce both system cost and board space.)+/Title <FEFF004400540041003100340034004500440020002D0020004400750061006C00200050004E0050002000420069006100730020005200650073006900730074006F00720020005400720061006E0073006900730074006F007200730020005200310020003D0020003400370020006B03A9002C0020005200320020003D0020003400370020006B03A9>+>>+endobj+2 0 obj+<<+/Type /Pages+/Kids [6 0 R 7 0 R 8 0 R 9 0 R 10 0 R 11 0 R 12 0 R 13 0 R 14 0 R 15 0 R+16 0 R]+/Count 11+>>+endobj+3 0 obj+<<+/Length 4117+/Subtype /XML+/Type /Metadata+>>+stream +<?xpacket begin="" id="W5M0MpCehiHzreSzNTczkc9d"?>+<x:xmpmeta xmlns:x="adobe:ns:meta/" x:xmptk="Adobe XMP Core 5.6-c017 91.164464, 2020/06/15-10:20:05 ">+ <rdf:RDF xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#">+ <rdf:Description rdf:about=""+ xmlns:xmp="http://ns.adobe.com/xap/1.0/"+ xmlns:dc="http://purl.org/dc/elements/1.1/"+ xmlns:pdf="http://ns.adobe.com/pdf/1.3/"+ xmlns:xmpMM="http://ns.adobe.com/xap/1.0/mm/">+ <xmp:CreatorTool>BroadVision, Inc.</xmp:CreatorTool>+ <xmp:ModifyDate>2020-10-23T15:06:57+08:00</xmp:ModifyDate>+ <xmp:CreateDate>2017-06-20T14:48:58+02:00</xmp:CreateDate>+ <xmp:MetadataDate>2020-10-23T15:06:57+08:00</xmp:MetadataDate>+ <dc:format>application/pdf</dc:format>+ <dc:title>+ <rdf:Alt>+ <rdf:li xml:lang="x-default">DTA144ED - Dual PNP Bias Resistor Transistors R1 = 47 kΩ, R2 = 47 kΩ</rdf:li>+ </rdf:Alt>+ </dc:title>+ <dc:creator>+ <rdf:Seq>+ <rdf:li>ON Semiconductor</rdf:li>+ </rdf:Seq>+ </dc:creator>+ <dc:description>+ <rdf:Alt>+ <rdf:li xml:lang="x-default">This series of digital transistors is designed to replace a single device and its external resistor bias network. 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