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Initial commit: component/mspm0g3106srhbr

Ray ·efc88cdede ·7h ago
2 files changed +420
README.mdadded+70
@@ -0,0 +1,70 @@+# MSPM0G3106SRHBR++**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · VQFN-32(5x5)++MSPM0G3106SRHBR from Texas Instruments, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PA0 | bidirectional | General-purpose digital I/O pin configurable as UART0_TX, I2C0_SDA, TIMA0_C0, timer output, or FCC input with 5V tolerant open-drain capability. |+| 2 | PA1 | bidirectional | General-purpose digital I/O pin configurable as UART0_RX, I2C0_SCL, TIMA0_C1, timer input/output, or FCC input with 5V tolerant open-drain capability. |+| 3 | NRST | input | Reset input signal, active low; must be pulled high to VDD for device operation. |+| 4 | VDD | power_in | Main power supply voltage input, 1.62V to 3.6V recommended operating range. |+| 5 | VSS | power_in | Ground/reference voltage for power supply. |+| 6 | PA2/ROSC | bidirectional | General-purpose digital I/O or external precision resistor input for SYSOSC frequency correction loop when FCL is enabled. |+| 7 | PA3/LFXIN | bidirectional | Low-frequency crystal oscillator input or general-purpose digital I/O pin with standard drive capability. |+| 8 | PA4/LFXOUT | bidirectional | Low-frequency crystal oscillator output or general-purpose digital I/O pin with standard drive capability. |+| 9 | PA5/HFXIN | bidirectional | High-frequency crystal oscillator input or general-purpose digital I/O pin with standard drive capability. |+| 10 | PA6/HFXOUT | bidirectional | High-frequency crystal oscillator output or general-purpose digital I/O pin with standard drive capability. |+| 11 | PA7 | bidirectional | General-purpose digital I/O pin configurable as clock output, timer, or PWM with standard drive capability. |+| 12 | PA8 | bidirectional | General-purpose digital I/O pin configurable for UART, SPI, or timer functions with standard drive capability. |+| 13 | PA9 | bidirectional | High-speed general-purpose digital I/O pin configurable for UART, SPI, timer, or RTC output with high-speed I/O capability. |+| 14 | PA10 | bidirectional | High-drive general-purpose digital I/O pin configurable for UART, SPI, or timer functions with 20mA drive capability, supports wake from shutdown mode. |+| 15 | PA11 | bidirectional | High-drive general-purpose digital I/O pin configurable for UART, SPI, or timer functions with 20mA drive capability, supports wake from shutdown mode. |+| 16 | PA12 | bidirectional | High-speed general-purpose digital I/O pin configurable as UART3, SPI0, timer input, CAN transmit, or ADC channel A0_12. |+| 17 | PA13 | bidirectional | High-speed general-purpose digital I/O pin configurable as UART3, SPI0, timer, or CAN receive with high-speed I/O capability. |+| 18 | PA14 | bidirectional | High-speed ADC channel A0_12 or general-purpose digital I/O pin configurable for UART, SPI, timer, or clock output. |+| 19 | PA15 | bidirectional | ADC1 analog input channel A1_0 or general-purpose digital I/O pin with standard drive capability. |+| 20 | PA16 | bidirectional | ADC1 analog input channel A1_1 or general-purpose digital I/O pin configurable for SPI or timer functions. |+| 21 | PA17 | bidirectional | ADC1 analog input channel A1_2 or general-purpose digital I/O pin with wake capability from shutdown mode. |+| 22 | PA18 | bidirectional | ADC1 analog input channel A1_3 or GPAMP negative input or general-purpose digital I/O pin with wake capability from shutdown mode. |+| 23 | PA19/SWDIO | bidirectional | Serial wire debug data I/O pin (primary function) or general-purpose digital I/O with high-speed capability. |+| 24 | PA20/SWCLK | input | Serial wire debug clock input (primary function) or general-purpose digital I/O with standard drive capability. |+| 25 | PA21/VREF- | bidirectional | ADC1 analog input channel A1_7 or external voltage reference negative input/internal reference ground with standard drive capability. |+| 26 | PA22/GPAMP_OUT | bidirectional | ADC0 analog input channel A0_7 or general-purpose amplifier output or general-purpose digital I/O with standard drive capability. |+| 27 | PA23/VREF+ | bidirectional | External voltage reference positive input or internal reference output or general-purpose digital I/O for UART, SPI, or timer functions. |+| 28 | PA24 | bidirectional | ADC0 analog input channel A0_3 or general-purpose digital I/O pin configurable for UART, SPI, or timer functions. |+| 29 | PA25 | bidirectional | ADC0 analog input channel A0_2 or general-purpose digital I/O pin with standard drive capability. |+| 30 | PA26/GPAMP_IN+ | bidirectional | ADC0 analog input channel A0_1 or general-purpose amplifier positive input or general-purpose digital I/O with standard drive capability. |+| 31 | PA27 | bidirectional | ADC0 analog input channel A0_0 or general-purpose digital I/O pin configurable for RTC output or SPI/timer functions. |+| 32 | VCORE | power_out | Regulated core voltage output from on-chip LDO, requires 470nF bypass capacitor to VSS. |+| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-32(5x5) |+| Category | Embedded Processors & Controllers |+| Pins | 33 |++## CAD (KiCad official)++- Symbol: `MSPM0G3106SRHBR`+- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`+- 3D model: VQFN-32(5x5) (KiCad packages3D, STEP)+- 3D model files: `mspm0g3106srhbr-etched.step` / `mspm0g3106srhbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mspm0g3106srhbr.step` / `mspm0g3106srhbr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590920951809204224) (69 pp, sha256 `7c5df909316e74bc`, retrieved 2026-10-07, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/mspm0g3106srhbr-datasheet.pdf)
page.jsonadded+350
@@ -0,0 +1,350 @@+{+  "slug": "mspm0g3106srhbr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "embedded processors & controllers",+    "mspm0g3106srhbr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "mspm0g3106srhbr.kicad_sym",+    "mspm0g3106srhbr.kicad_mod",+    "mspm0g3106srhbr.glb",+    "mspm0g3106srhbr.step",+    "mspm0g3106srhbr.lbr",+    "docs/hero.png",+    "docs/mspm0g3106srhbr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "mspm0g3106srhbr-hero.glb",+    "mspm0g3106srhbr-hero.overlay.json"+  ],+  "component": {+    "mpn": "MSPM0G3106SRHBR",+    "manufacturer": "Texas Instruments",+    "package": "VQFN-32(5x5)",+    "pin_count": 33,+    "category": "Embedded Processors & Controllers",+    "subcategory": "Microcontrollers (MCU/MPU/SOC)",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590920951809204224",+    "parts": {+      "symbol": "mspm0g3106srhbr.kicad_sym",+      "footprint": "mspm0g3106srhbr.kicad_mod",+      "model_3d": "mspm0g3106srhbr-hero.glb",+      "model_3d_plain": "mspm0g3106srhbr.glb",+      "model_3d_step": "mspm0g3106srhbr-etched.step",+      "model_3d_step_plain": "mspm0g3106srhbr.step",+      "lbr": "mspm0g3106srhbr.lbr"+    },+    "distributor_links": {+      "lcsc": "C22362619",+      "digikey": "296-MSPM0G3106SRHBRTR-ND",+      "mouser": "595-MSPM0G3106SRHBR"+    },+    "distributor_check": {+      "checked_at": "2026-10-07T08:53:01Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-MSPM0G3106SRHBRTR-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "595-MSPM0G3106SRHBR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "PA0",+        "type": "bidirectional",+        "description": "General-purpose digital I/O pin configurable as UART0_TX, I2C0_SDA, TIMA0_C0, timer output, or FCC input with 5V tolerant open-drain capability."+      },+      {+        "number": "2",+        "name": "PA1",+        "type": "bidirectional",+        "description": "General-purpose digital I/O pin configurable as UART0_RX, I2C0_SCL, TIMA0_C1, timer input/output, or FCC input with 5V tolerant open-drain capability."+      },+      {+        "number": "3",+        "name": "NRST",+        "type": "input",+        "description": "Reset input signal, active low; must be pulled high to VDD for device operation."+      },+      {+        "number": "4",+        "name": "VDD",+        "type": "power_in",+        "description": "Main power supply voltage input, 1.62V to 3.6V recommended operating range."+      },+      {+        "number": "5",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground/reference voltage for power supply."+      },+      {+        "number": "6",+        "name": "PA2/ROSC",+        "type": "bidirectional",+        "description": "General-purpose digital I/O or external precision resistor input for SYSOSC frequency correction loop when FCL is enabled."+      },+      {+        "number": "7",+        "name": "PA3/LFXIN",+        "type": "bidirectional",+        "description": "Low-frequency crystal oscillator input or general-purpose digital I/O pin with standard drive capability."+      },+      {+        "number": "8",+        "name": "PA4/LFXOUT",+        "type": "bidirectional",+        "description": "Low-frequency crystal oscillator output or general-purpose digital I/O pin with standard drive capability."+      },+      {+        "number": "9",+        "name": "PA5/HFXIN",+        "type": "bidirectional",+        "description": "High-frequency crystal oscillator input or general-purpose digital I/O pin with standard drive capability."+      },+      {+        "number": "10",+        "name": "PA6/HFXOUT",+        "type": "bidirectional",+        "description": "High-frequency crystal oscillator output or general-purpose digital I/O pin with standard drive capability."+      },+      {+        "number": "11",+        "name": "PA7",+        "type": "bidirectional",+        "description": "General-purpose digital I/O pin configurable as clock output, timer, or PWM with standard drive capability."+      },+      {+        "number": "12",+        "name": "PA8",+        "type": "bidirectional",+        "description": "General-purpose digital I/O pin configurable for UART, SPI, or timer functions with standard drive capability."+      },+      {+        "number": "13",+        "name": "PA9",+        "type": "bidirectional",+        "description": "High-speed general-purpose digital I/O pin configurable for UART, SPI, timer, or RTC output with high-speed I/O capability."+      },+      {+        "number": "14",+        "name": "PA10",+        "type": "bidirectional",+        "description": "High-drive general-purpose digital I/O pin configurable for UART, SPI, or timer functions with 20mA drive capability, supports wake from shutdown mode."+      },+      {+        "number": "15",+        "name": "PA11",+        "type": "bidirectional",+        "description": "High-drive general-purpose digital I/O pin configurable for UART, SPI, or timer functions with 20mA drive capability, supports wake from shutdown mode."+      },+      {+        "number": "16",+        "name": "PA12",+        "type": "bidirectional",+        "description": "High-speed general-purpose digital I/O pin configurable as UART3, SPI0, timer input, CAN transmit, or ADC channel A0_12."+      },+      {+        "number": "17",+        "name": "PA13",+        "type": "bidirectional",+        "description": "High-speed general-purpose digital I/O pin configurable as UART3, SPI0, timer, or CAN receive with high-speed I/O capability."+      },+      {+        "number": "18",+        "name": "PA14",+        "type": "bidirectional",+        "description": "High-speed ADC channel A0_12 or general-purpose digital I/O pin configurable for UART, SPI, timer, or clock output."+      },+      {+        "number": "19",+        "name": "PA15",+        "type": "bidirectional",+        "description": "ADC1 analog input channel A1_0 or general-purpose digital I/O pin with standard drive capability."+      },+      {+        "number": "20",+        "name": "PA16",+        "type": "bidirectional",+        "description": "ADC1 analog input channel A1_1 or general-purpose digital I/O pin configurable for SPI or timer functions."+      },+      {+        "number": "21",+        "name": "PA17",+        "type": "bidirectional",+        "description": "ADC1 analog input channel A1_2 or general-purpose digital I/O pin with wake capability from shutdown mode."+      },+      {+        "number": "22",+        "name": "PA18",+        "type": "bidirectional",+        "description": "ADC1 analog input channel A1_3 or GPAMP negative input or general-purpose digital I/O pin with wake capability from shutdown mode."+      },+      {+        "number": "23",+        "name": "PA19/SWDIO",+        "type": "bidirectional",+        "description": "Serial wire debug data I/O pin (primary function) or general-purpose digital I/O with high-speed capability."+      },+      {+        "number": "24",+        "name": "PA20/SWCLK",+        "type": "input",+        "description": "Serial wire debug clock input (primary function) or general-purpose digital I/O with standard drive capability."+      },+      {+        "number": "25",+        "name": "PA21/VREF-",+        "type": "bidirectional",+        "description": "ADC1 analog input channel A1_7 or external voltage reference negative input/internal reference ground with standard drive capability."+      },+      {+        "number": "26",+        "name": "PA22/GPAMP_OUT",+        "type": "bidirectional",+        "description": "ADC0 analog input channel A0_7 or general-purpose amplifier output or general-purpose digital I/O with standard drive capability."+      },+      {+        "number": "27",+        "name": "PA23/VREF+",+        "type": "bidirectional",+        "description": "External voltage reference positive input or internal reference output or general-purpose digital I/O for UART, SPI, or timer functions."+      },+      {+        "number": "28",+        "name": "PA24",+        "type": "bidirectional",+        "description": "ADC0 analog input channel A0_3 or general-purpose digital I/O pin configurable for UART, SPI, or timer functions."+      },+      {+        "number": "29",+        "name": "PA25",+        "type": "bidirectional",+        "description": "ADC0 analog input channel A0_2 or general-purpose digital I/O pin with standard drive capability."+      },+      {+        "number": "30",+        "name": "PA26/GPAMP_IN+",+        "type": "bidirectional",+        "description": "ADC0 analog input channel A0_1 or general-purpose amplifier positive input or general-purpose digital I/O with standard drive capability."+      },+      {+        "number": "31",+        "name": "PA27",+        "type": "bidirectional",+        "description": "ADC0 analog input channel A0_0 or general-purpose digital I/O pin configurable for RTC output or SPI/timer functions."+      },+      {+        "number": "32",+        "name": "VCORE",+        "type": "power_out",+        "description": "Regulated core voltage output from on-chip LDO, requires 470nF bypass capacitor to VSS."+      },+      {+        "number": "33",+        "name": "EP",+        "type": "passive",+        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Thermal pad present in VQFN-32 package (not numbered); datasheet recommends connecting to VSS for he; PA3/PA4 and PA5/PA6 have crystal oscillator functions (LFXIN/LFXOUT, HFXIN/HFXOUT) but can also func; PA21 and PA23 serve dual roles as VREF- and VREF+ reference pins respectively, requiring proper deco",+          "exposed pad 33 added from the footprint"+        ],+        "pages_sent": 51,+        "cost_usd": 0.4556,+        "at": "2026-10-07T08:52:46"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590920951809204224",+        "pages": 69,+        "sha256": "7c5df909316e74bc",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 33,+        "described": 33,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "mspm0g3106srhbr.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          5,+          5,+          0.875+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "mspm0g3106srhbr-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          5,+          5,+          0.875+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "7305c3fed9957c0a95c840405f92aeee50b84d234a44460f967b27fcb417756f",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file