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Initial commit: component/msp430g2353ipw20r

Ray ·84f26050de ·1d ago
2 files changed +329
README.mdadded+57
@@ -0,0 +1,57 @@+# MSP430G2353IPW20R++**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · TSSOP-20++MSP430G2353IPW20R from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DVCC | power_in | Digital supply voltage, 1.8 V to 3.6 V during program execution and 2.2 V to 3.6 V during flash programming or erase. |+| 2 | P1.0/TA0CLK/ACLK/A0/CA0 | bidirectional | General-purpose digital I/O (Port P1, interrupt capable, individually programmable pull-up/pull-down) with alternate functions Timer0_A TACLK input, ACLK output, ADC10 analog input A0 and Comparator_A+ input CA0. |+| 3 | P1.1/TA0.0/UCA0RXD/UCA0SOMI/A1/CA1 | bidirectional | General-purpose digital I/O with alternate functions Timer0_A CCI0A capture input and Out0 output, USCI_A0 UART receive data input or SPI slave-out, ADC10 analog input A1, Comparator_A+ input CA1, and BSL data transmit. |+| 4 | P1.2/TA0.1/UCA0TXD/UCA0SIMO/A2/CA2 | bidirectional | General-purpose digital I/O with alternate functions Timer0_A CCI1A capture input and Out1 output, USCI_A0 UART transmit data output or SPI slave-in, ADC10 analog input A2, and Comparator_A+ input CA2. |+| 5 | P1.3/ADC10CLK/CAOUT/VREF-/VEREF-/A3/CA3 | bidirectional | General-purpose digital I/O with alternate functions ADC10 conversion clock output, Comparator_A+ output CAOUT, ADC10 negative reference VREF-/VEREF-, ADC10 analog input A3, and Comparator_A+ input CA3. |+| 6 | P1.4/SMCLK/UCB0STE/UCA0CLK/VREF+/VEREF+/A4/CA4/TCK | bidirectional | General-purpose digital I/O with alternate functions SMCLK output, USCI_B0 slave transmit enable, USCI_A0 clock input/output, ADC10 positive reference VREF+/VEREF+, ADC10 analog input A4, Comparator_A+ input CA4, and JTAG test clock TCK. |+| 7 | P1.5/TA0.0/UCB0CLK/UCA0STE/A5/CA5/TMS | bidirectional | General-purpose digital I/O with alternate functions Timer0_A Out0 output, USCI_B0 clock input/output, USCI_A0 slave transmit enable, ADC10 analog input A5, Comparator_A+ input CA5, JTAG test mode select TMS, and BSL data receive. |+| 8 | P2.0/TA1.0 | bidirectional | General-purpose digital I/O (Port P2, interrupt capable) with alternate functions Timer1_A CCI0A capture input and Out0 output. |+| 9 | P2.1/TA1.1 | bidirectional | General-purpose digital I/O (Port P2, interrupt capable) with alternate functions Timer1_A CCI1A capture input and Out1 output. |+| 10 | P2.2/TA1.1 | bidirectional | General-purpose digital I/O (Port P2, interrupt capable) with alternate functions Timer1_A CCI1B capture input and Out1 output. |+| 11 | P2.3/TA1.0 | bidirectional | General-purpose digital I/O (Port P2, interrupt capable) with alternate functions Timer1_A CCI0B capture input and Out0 output. |+| 12 | P2.4/TA1.2 | bidirectional | General-purpose digital I/O (Port P2, interrupt capable) with alternate functions Timer1_A CCI2A capture input and Out2 output. |+| 13 | P2.5/TA1.2 | bidirectional | General-purpose digital I/O (Port P2, interrupt capable) with alternate functions Timer1_A CCI2B capture input and Out2 output. |+| 14 | P1.6/TA0.1/UCB0SOMI/UCB0SCL/A6/CA6/TDI/TCLK | bidirectional | General-purpose digital I/O with alternate functions Timer0_A Out1 output, USCI_B0 SPI slave-out/master-in or I2C clock SCL, ADC10 analog input A6, Comparator_A+ input CA6, and JTAG test data input or test clock TDI/TCLK during programming and test. |+| 15 | P1.7/CAOUT/UCB0SIMO/UCB0SDA/A7/CA7/TDO/TDI | bidirectional | General-purpose digital I/O with alternate functions Comparator_A+ output CAOUT, USCI_B0 SPI slave-in/master-out or I2C data SDA, ADC10 analog input A7, Comparator_A+ input CA7, and JTAG test data output or input TDO/TDI. |+| 16 | RST/NMI/SBWTDIO | input | Reset input, or non-maskable interrupt input when configured as NMI, and Spy-Bi-Wire test data input/output during programming and test. |+| 17 | TEST/SBWTCK | input | Selects test mode for the JTAG pins on Port 1, has the device protection fuse connected to it, and serves as Spy-Bi-Wire test clock input during programming and test. |+| 18 | XOUT/P2.7 | bidirectional | Crystal oscillator output terminal or general-purpose digital I/O P2.7; if used as an input, excess current flows until P2SEL.7 is cleared after reset. |+| 19 | XIN/P2.6/TA0.1 | bidirectional | Crystal oscillator input terminal, or general-purpose digital I/O P2.6 with alternate function Timer0_A Out1 output. |+| 20 | DVSS | power_in | Ground reference for the digital supply, 0 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-20 |+| Category | Embedded Processors & Controllers |+| Pins | 20 |++## CAD (KiCad official)++- Symbol: `MSP430G2353IPW20R`+- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`+- 3D model: TSSOP-20 (KiCad packages3D, STEP)+- 3D model files: `msp430g2353ipw20r-etched.step` / `msp430g2353ipw20r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `msp430g2353ipw20r.step` / `msp430g2353ipw20r.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/msp430g2353) (88 pp, sha256 `6b2ec0d3ff2ce347`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/msp430g2353ipw20r-datasheet.pdf)
page.jsonadded+272
@@ -0,0 +1,272 @@+{+  "slug": "msp430g2353ipw20r",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "embedded processors & controllers",+    "msp430g2353ipw20r",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "msp430g2353ipw20r.kicad_sym",+    "msp430g2353ipw20r.kicad_mod",+    "msp430g2353ipw20r.glb",+    "msp430g2353ipw20r.step",+    "msp430g2353ipw20r.lbr",+    "docs/hero.png",+    "docs/msp430g2353ipw20r-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "msp430g2353ipw20r-hero.glb",+    "msp430g2353ipw20r-hero.overlay.json"+  ],+  "component": {+    "mpn": "MSP430G2353IPW20R",+    "manufacturer": "Texas Instruments",+    "package": "TSSOP-20",+    "pin_count": 20,+    "category": "Embedded Processors & Controllers",+    "subcategory": "Microcontrollers (MCU/MPU/SOC)",+    "datasheet": "https://www.ti.com/cn/lit/gpn/msp430g2353",+    "parts": {+      "symbol": "msp430g2353ipw20r.kicad_sym",+      "footprint": "msp430g2353ipw20r.kicad_mod",+      "model_3d": "msp430g2353ipw20r-hero.glb",+      "model_3d_plain": "msp430g2353ipw20r.glb",+      "model_3d_step": "msp430g2353ipw20r-etched.step",+      "model_3d_step_plain": "msp430g2353ipw20r.step",+      "lbr": "msp430g2353ipw20r.lbr"+    },+    "distributor_links": {+      "lcsc": "C2054270",+      "digikey": "296-MSP430G2353IPW20RTR-ND",+      "mouser": "595-SP430G2353IPW20R"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T15:02:13Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-MSP430G2353IPW20RTR-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "595-SP430G2353IPW20R",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "DVCC",+        "type": "power_in",+        "description": "Digital supply voltage, 1.8 V to 3.6 V during program execution and 2.2 V to 3.6 V during flash programming or erase."+      },+      {+        "number": "2",+        "name": "P1.0/TA0CLK/ACLK/A0/CA0",+        "type": "bidirectional",+        "description": "General-purpose digital I/O (Port P1, interrupt capable, individually programmable pull-up/pull-down) with alternate functions Timer0_A TACLK input, ACLK output, ADC10 analog input A0 and Comparator_A+ input CA0."+      },+      {+        "number": "3",+        "name": "P1.1/TA0.0/UCA0RXD/UCA0SOMI/A1/CA1",+        "type": "bidirectional",+        "description": "General-purpose digital I/O with alternate functions Timer0_A CCI0A capture input and Out0 output, USCI_A0 UART receive data input or SPI slave-out, ADC10 analog input A1, Comparator_A+ input CA1, and BSL data transmit."+      },+      {+        "number": "4",+        "name": "P1.2/TA0.1/UCA0TXD/UCA0SIMO/A2/CA2",+        "type": "bidirectional",+        "description": "General-purpose digital I/O with alternate functions Timer0_A CCI1A capture input and Out1 output, USCI_A0 UART transmit data output or SPI slave-in, ADC10 analog input A2, and Comparator_A+ input CA2."+      },+      {+        "number": "5",+        "name": "P1.3/ADC10CLK/CAOUT/VREF-/VEREF-/A3/CA3",+        "type": "bidirectional",+        "description": "General-purpose digital I/O with alternate functions ADC10 conversion clock output, Comparator_A+ output CAOUT, ADC10 negative reference VREF-/VEREF-, ADC10 analog input A3, and Comparator_A+ input CA3."+      },+      {+        "number": "6",+        "name": "P1.4/SMCLK/UCB0STE/UCA0CLK/VREF+/VEREF+/A4/CA4/TCK",+        "type": "bidirectional",+        "description": "General-purpose digital I/O with alternate functions SMCLK output, USCI_B0 slave transmit enable, USCI_A0 clock input/output, ADC10 positive reference VREF+/VEREF+, ADC10 analog input A4, Comparator_A+ input CA4, and JTAG test clock TCK."+      },+      {+        "number": "7",+        "name": "P1.5/TA0.0/UCB0CLK/UCA0STE/A5/CA5/TMS",+        "type": "bidirectional",+        "description": "General-purpose digital I/O with alternate functions Timer0_A Out0 output, USCI_B0 clock input/output, USCI_A0 slave transmit enable, ADC10 analog input A5, Comparator_A+ input CA5, JTAG test mode select TMS, and BSL data receive."+      },+      {+        "number": "8",+        "name": "P2.0/TA1.0",+        "type": "bidirectional",+        "description": "General-purpose digital I/O (Port P2, interrupt capable) with alternate functions Timer1_A CCI0A capture input and Out0 output."+      },+      {+        "number": "9",+        "name": "P2.1/TA1.1",+        "type": "bidirectional",+        "description": "General-purpose digital I/O (Port P2, interrupt capable) with alternate functions Timer1_A CCI1A capture input and Out1 output."+      },+      {+        "number": "10",+        "name": "P2.2/TA1.1",+        "type": "bidirectional",+        "description": "General-purpose digital I/O (Port P2, interrupt capable) with alternate functions Timer1_A CCI1B capture input and Out1 output."+      },+      {+        "number": "11",+        "name": "P2.3/TA1.0",+        "type": "bidirectional",+        "description": "General-purpose digital I/O (Port P2, interrupt capable) with alternate functions Timer1_A CCI0B capture input and Out0 output."+      },+      {+        "number": "12",+        "name": "P2.4/TA1.2",+        "type": "bidirectional",+        "description": "General-purpose digital I/O (Port P2, interrupt capable) with alternate functions Timer1_A CCI2A capture input and Out2 output."+      },+      {+        "number": "13",+        "name": "P2.5/TA1.2",+        "type": "bidirectional",+        "description": "General-purpose digital I/O (Port P2, interrupt capable) with alternate functions Timer1_A CCI2B capture input and Out2 output."+      },+      {+        "number": "14",+        "name": "P1.6/TA0.1/UCB0SOMI/UCB0SCL/A6/CA6/TDI/TCLK",+        "type": "bidirectional",+        "description": "General-purpose digital I/O with alternate functions Timer0_A Out1 output, USCI_B0 SPI slave-out/master-in or I2C clock SCL, ADC10 analog input A6, Comparator_A+ input CA6, and JTAG test data input or test clock TDI/TCLK during programming and test."+      },+      {+        "number": "15",+        "name": "P1.7/CAOUT/UCB0SIMO/UCB0SDA/A7/CA7/TDO/TDI",+        "type": "bidirectional",+        "description": "General-purpose digital I/O with alternate functions Comparator_A+ output CAOUT, USCI_B0 SPI slave-in/master-out or I2C data SDA, ADC10 analog input A7, Comparator_A+ input CA7, and JTAG test data output or input TDO/TDI."+      },+      {+        "number": "16",+        "name": "RST/NMI/SBWTDIO",+        "type": "input",+        "description": "Reset input, or non-maskable interrupt input when configured as NMI, and Spy-Bi-Wire test data input/output during programming and test."+      },+      {+        "number": "17",+        "name": "TEST/SBWTCK",+        "type": "input",+        "description": "Selects test mode for the JTAG pins on Port 1, has the device protection fuse connected to it, and serves as Spy-Bi-Wire test clock input during programming and test."+      },+      {+        "number": "18",+        "name": "XOUT/P2.7",+        "type": "bidirectional",+        "description": "Crystal oscillator output terminal or general-purpose digital I/O P2.7; if used as an input, excess current flows until P2SEL.7 is cleared after reset."+      },+      {+        "number": "19",+        "name": "XIN/P2.6/TA0.1",+        "type": "bidirectional",+        "description": "Crystal oscillator input terminal, or general-purpose digital I/O P2.6 with alternate function Timer0_A Out1 output."+      },+      {+        "number": "20",+        "name": "DVSS",+        "type": "power_in",+        "description": "Ground reference for the digital supply, 0 V."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The MPN is the 20-pin PW (TSSOP) variant of the G2x53 family; the datasheet's 20-pin TSSOP/PDIP diag; ADC10 functions (A0-A7, ADC10CLK, VREF+/VREF-, VEREF+/VEREF-) and Comparator/ADC references are list; Table 2 specifies the PW20 column as the source of pin numbers; the 20-pin TSSOP has no P3 port, AVC",+          "9/20 pins cited to the wrong page (name found elsewhere): ['1:DVCC@p22', '5:P1.3/ADC10CLK/CAOUT/VREF-/VEREF-/A3/CA3@p45', '8:P2.0/TA1.0@p51', '9:P2.1/TA1.1@p51']"+        ],+        "pages_sent": 64,+        "cost_usd": 0.3217,+        "at": "2026-10-08T15:01:55"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/msp430g2353",+        "pages": 88,+        "sha256": "6b2ec0d3ff2ce347",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 20,+        "described": 20,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "msp430g2353ipw20r.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6.4,+          6.5,+          1.2+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "msp430g2353ipw20r-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6.4,+          6.5,+          1.2+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "9d8605354fdb5c5fb3b3d767d82ec41261d064854cc945ef1db3d7aedaa37726",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file