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MSP430FR69891IPZR
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Texas Instruments Microcontroller Units (MCUs/MPUs/SOCs), LQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+137@@ -0,0 +1,137 @@+# MSP430FR69891IPZR++**Texas Instruments** · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-100(14x14)++MSP430FR69891IPZR from Texas Instruments, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | P4.3/UCA0SOMI/UCA0RXD/UCB1STE | bidirectional | General-purpose digital I/O; alternates are USCI_A0 SPI slave-out/master-in or UART receive data, and USCI_B1 SPI slave transmit enable. |+| 2 | P1.4/UCB0CLK/UCA0STE/TA1.0/S1 | bidirectional | General-purpose digital I/O; alternates are USCI_B0 SPI clock, USCI_A0 SPI slave transmit enable, Timer_A TA1 CCR0 capture/compare, and LCD segment S1. |+| 3 | P1.5/UCB0STE/UCA0CLK/TA0.0/S0 | bidirectional | General-purpose digital I/O; alternates are USCI_B0 SPI slave transmit enable, USCI_A0 SPI clock, Timer_A TA0 CCR0 capture/compare, and LCD segment S0. |+| 4 | P1.6/UCB0SIMO/UCB0SDA/TA0.1 | bidirectional | General-purpose digital I/O; alternates are USCI_B0 SPI slave-in/master-out or I2C data, BSL data on I2C-BSL devices, and Timer_A TA0 CCR1 capture/compare. |+| 5 | P1.7/UCB0SOMI/UCB0SCL/TA0.2 | bidirectional | General-purpose digital I/O; alternates are USCI_B0 SPI slave-out/master-in or I2C clock, BSL clock on I2C-BSL devices, and Timer_A TA0 CCR2 capture/compare. |+| 6 | R33/LCDCAP | passive | Input/output port of the most positive analog LCD voltage (V1) and LCD capacitor connection; if unused it can be tied to DVSS or DVCC. |+| 7 | P6.0/R23 | bidirectional | General-purpose digital I/O and input/output port of the second most positive analog LCD voltage (V2). |+| 8 | P6.1/R13/LCDREF | bidirectional | General-purpose digital I/O; also input/output port of the third most positive LCD voltage (V3 or V4) and external reference input for regulated LCD voltage. |+| 9 | P6.2/COUT/R03 | bidirectional | General-purpose digital I/O; also comparator output and input/output port of the lowest analog LCD voltage (V5). |+| 10 | P6.3/COM0 | bidirectional | General-purpose digital I/O; also LCD common output COM0 for the LCD backplane. |+| 11 | P6.4/TB0.0/COM1 | bidirectional | General-purpose digital I/O; also Timer_B TB0 CCR0 capture/compare and LCD common output COM1. |+| 12 | P6.5/TB0.1/COM2 | bidirectional | General-purpose digital I/O; also Timer_B TB0 CCR1 capture/compare and LCD common output COM2. |+| 13 | P6.6/TB0.2/COM3 | bidirectional | General-purpose digital I/O; also Timer_B TB0 CCR2 capture/compare and LCD common output COM3. |+| 14 | P2.4/TB0.3/COM4/S43 | bidirectional | General-purpose digital I/O; also Timer_B TB0 CCR3 capture/compare, LCD common output COM4, and LCD segment S43. |+| 15 | P2.5/TB0.4/COM5/S42 | bidirectional | General-purpose digital I/O; also Timer_B TB0 CCR4 capture/compare, LCD common output COM5, and LCD segment S42. |+| 16 | P2.6/TB0.5/ESIC1OUT/COM6/S41 | bidirectional | General-purpose digital I/O; also Timer_B TB0 CCR5 capture/compare, ESI comparator 1 output, LCD common output COM6, and LCD segment S41. |+| 17 | P2.7/TB0.6/COM7/S40/ESIC2OUT | bidirectional | General-purpose digital I/O; also Timer_B TB0 CCR6 capture/compare, ESI comparator 2 output, LCD common output COM7, and LCD segment S40. |+| 18 | P10.2/TA1.0/SMCLK/S39 | bidirectional | General-purpose digital I/O; also Timer_A TA1 CCR0 capture/compare, SMCLK output, and LCD segment S39. |+| 19 | P5.0/TA1.1/MCLK/S38 | bidirectional | General-purpose digital I/O; also Timer_A TA1 CCR1 capture/compare, MCLK output, and LCD segment S38. |+| 20 | P5.1/TA1.2/S37 | bidirectional | General-purpose digital I/O; also Timer_A TA1 CCR2 capture/compare and LCD segment S37. |+| 21 | P5.2/TA1.0/TA1CLK/ACLK/S36 | bidirectional | General-purpose digital I/O; also Timer_A TA1 CCR0 capture/compare, TA1CLK clock input, ACLK output, and LCD segment S36. |+| 22 | P5.3/UCB1STE/S35 | bidirectional | General-purpose digital I/O; also USCI_B1 SPI slave transmit enable and LCD segment S35. |+| 23 | P3.0/UCB1CLK/S34 | bidirectional | General-purpose digital I/O; also USCI_B1 clock input (SPI slave) or output (SPI master) and LCD segment S34. |+| 24 | P3.1/UCB1SIMO/UCB1SDA/S33 | bidirectional | General-purpose digital I/O; also USCI_B1 SPI slave-in/master-out or I2C data, and LCD segment S33. |+| 25 | P3.2/UCB1SOMI/UCB1SCL/S32 | bidirectional | General-purpose digital I/O; also USCI_B1 SPI slave-out/master-in or I2C clock, and LCD segment S32. |+| 26 | DVSS1 | power_in | Digital ground supply; all DVSS, AVSS and ESIDVSS pins are referenced to VSS = 0 V. |+| 27 | DVCC1 | power_in | Digital power supply; VCC is 1.8 V to 3.6 V and each DVCC pin needs 1 µF plus 100 nF low-ESR ceramic decoupling placed close to the pin. |+| 28 | TEST/SBWTCK | input | Test mode pin that selects digital I/O on the JTAG pins and serves as the Spy-Bi-Wire input clock; it always has an internal pulldown enabled and should be left open. |+| 29 | RST/NMI/SBWTDIO | bidirectional | Active-low reset input, nonmaskable interrupt input, and Spy-Bi-Wire data input/output; if unused, use a 47-kΩ pullup or internal pullup with a 2.2-nF pulldown per Table 4-3. |+| 30 | PJ.0/TDO/TB0OUTH/SMCLK/SRSCG1 | bidirectional | General-purpose digital I/O; alternates are JTAG test data output TDO, Timer_B TB0OUTH high-impedance switch, SMCLK output, and CPU status register bit SCG1 for low-power debug. |+| 31 | PJ.1/TDI/TCLK/MCLK/SRSCG0 | bidirectional | General-purpose digital I/O; alternates are JTAG test data input or test clock (TDI/TCLK), MCLK output, and CPU status register bit SCG0 for low-power debug. |+| 32 | PJ.2/TMS/ACLK/SROSCOFF | bidirectional | General-purpose digital I/O; alternates are JTAG test mode select TMS, ACLK output, and CPU status register bit OSCOFF for low-power debug. |+| 33 | PJ.3/TCK/COUT/SRCPUOFF | bidirectional | General-purpose digital I/O; alternates are JTAG test clock TCK, comparator output COUT, and CPU status register bit CPUOFF for low-power debug. |+| 34 | P6.7/TA0CLK/S31 | bidirectional | General-purpose digital I/O; also Timer_A TA0CLK clock input and LCD segment S31. |+| 35 | P7.5/TA0.2/S30 | bidirectional | General-purpose digital I/O; also Timer_A TA0 CCR2 capture/compare and LCD segment S30. |+| 36 | P7.6/TA0.1/S29 | bidirectional | General-purpose digital I/O; also Timer_A TA0 CCR1 capture/compare and LCD segment S29. |+| 37 | P10.1/TA0.0/S28 | bidirectional | General-purpose digital I/O; also Timer_A TA0 CCR0 capture/compare and LCD segment S28. |+| 38 | P7.7/TA1.2/TB0OUTH/S27 | bidirectional | General-purpose digital I/O; also Timer_A TA1 CCR2 capture/compare, Timer_B TB0OUTH high-impedance switch input, and LCD segment S27. |+| 39 | P3.3/TA1.1/TB0CLK/S26 | bidirectional | General-purpose digital I/O; also Timer_A TA1 CCR1 capture/compare, Timer_B TB0CLK clock input, and LCD segment S26. |+| 40 | P3.4/UCA1SIMO/UCA1TXD/TB0.0/S25 | bidirectional | General-purpose digital I/O; also USCI_A1 SPI slave-in/master-out or UART transmit, Timer_B TB0 CCR0 capture/compare, and LCD segment S25. |+| 41 | P3.5/UCA1SOMI/UCA1RXD/TB0.1/S24 | bidirectional | General-purpose digital I/O; also USCI_A1 SPI slave-out/master-in or UART receive, Timer_B TB0 CCR1 capture/compare, and LCD segment S24. |+| 42 | P3.6/UCA1CLK/TB0.2/S23 | bidirectional | General-purpose digital I/O; also USCI_A1 SPI clock, Timer_B TB0 CCR2 capture/compare, and LCD segment S23. |+| 43 | P3.7/UCA1STE/TB0.3/S22 | bidirectional | General-purpose digital I/O; also USCI_A1 SPI slave transmit enable, Timer_B TB0 CCR3 capture/compare, and LCD segment S22. |+| 44 | P8.0/RTCCLK/S21 | bidirectional | General-purpose digital I/O; also RTC clock output for calibration and LCD segment S21. |+| 45 | P8.1/DMAE0/S20 | bidirectional | General-purpose digital I/O; also DMA external trigger input and LCD segment S20. |+| 46 | P8.2/S19 | bidirectional | General-purpose digital I/O and LCD segment S19. |+| 47 | P8.3/MCLK/S18 | bidirectional | General-purpose digital I/O; also MCLK output and LCD segment S18. |+| 48 | P2.3/UCA0STE/TB0OUTH | bidirectional | General-purpose digital I/O; also USCI_A0 SPI slave transmit enable, Timer_B TB0OUTH high-impedance switch input, and LCD segment S17. |+| 49 | P2.2/UCA0CLK/TB0.4/RTCCLK | bidirectional | General-purpose digital I/O; also USCI_A0 SPI clock, Timer_B TB0 CCR4 capture/compare, RTC clock output for calibration, and LCD segment S16. |+| 50 | P2.1/UCA0SOMI/UCA0RXD/TB0.5/DMAE0/S15 | bidirectional | General-purpose digital I/O; also USCI_A0 SPI slave-out/master-in or UART receive, UART BSL receive, Timer_B TB0 CCR5 capture/compare, DMA external trigger input, and LCD segment S15. |+| 51 | P2.0/UCA0SIMO/UCA0TXD/TB0.6/TB0CLK/S14 | bidirectional | General-purpose digital I/O; also USCI_A0 SPI slave-in/master-out or UART transmit, UART BSL transmit, Timer_B TB0 CCR6 capture/compare, TB0CLK clock input, and LCD segment S14. |+| 52 | P7.0/TA0CLK/S17 | bidirectional | General-purpose digital I/O; also Timer_A TA0CLK clock input and LCD segment S17. |+| 53 | P7.1/TA0.0/ACLK/S16 | bidirectional | General-purpose digital I/O; also Timer_A TA0 CCR0 capture/compare, ACLK output, and LCD segment S16. |+| 54 | P7.2/TA0.1/S15 | bidirectional | General-purpose digital I/O; also Timer_A TA0 CCR1 capture/compare and LCD segment S15. |+| 55 | P7.3/TA0.2/S14 | bidirectional | General-purpose digital I/O; also Timer_A TA0 CCR2 capture/compare and LCD segment S14. |+| 56 | P7.4/SMCLK/S13 | bidirectional | General-purpose digital I/O; also SMCLK output and LCD segment S13. |+| 57 | DVSS2 | power_in | Digital ground supply; tie to VSS = 0 V. |+| 58 | DVCC2 | power_in | Digital power supply; VCC is 1.8 V to 3.6 V and needs 1 µF plus 100 nF low-ESR decoupling close to the pin. |+| 59 | P8.4/A7/C7 | bidirectional | General-purpose digital I/O; also ADC analog input A7 and comparator input C7. |+| 60 | P8.5/A6/C6 | bidirectional | General-purpose digital I/O; also ADC analog input A6 and comparator input C6. |+| 61 | P8.6/A5/C5 | bidirectional | General-purpose digital I/O; also ADC analog input A5 and comparator input C5. |+| 62 | P8.7/A4/C4 | bidirectional | General-purpose digital I/O; also ADC analog input A4 and comparator input C4. |+| 63 | P1.3/TA1.2/ESITEST4/A3/C3 | bidirectional | General-purpose digital I/O; also ESI test signal 4, Timer_A TA1 CCR2 capture/compare, ADC analog input A3, and comparator input C3. |+| 64 | P1.2/TA1.1/TA0CLK/COUT/A2/C2 | bidirectional | General-purpose digital I/O; also Timer_A TA1 CCR1 capture/compare, TA0CLK clock input, comparator output COUT, ADC analog input A2, and comparator input C2. |+| 65 | P1.1/TA0.2/TA1CLK/COUT/A1/C1/VREF+/VeREF+ | bidirectional | General-purpose digital I/O; also Timer_A TA0 CCR2 capture/compare, TA1CLK clock input, comparator output COUT, ADC analog input A1, comparator input C1, and positive reference voltage output or external positive reference input to the ADC. |+| 66 | P1.0/TA0.1/DMAE0/RTCCLK/A0/C0/VREF-/VeREF- | bidirectional | General-purpose digital I/O; also Timer_A TA0 CCR1 capture/compare, DMA external trigger input, RTC clock output for calibration, ADC analog input A0, comparator input C0, and negative reference voltage output or external negative reference input to the ADC. |+| 67 | P9.0/ESICH0/ESITEST0/A8/C8 | bidirectional | General-purpose digital I/O; also ESI channel 0 sensor excitation output and signal input, ESI test signal 0, ADC analog input A8, and comparator input C8. |+| 68 | P9.1/ESICH1/ESITEST1/A9/C9 | bidirectional | General-purpose digital I/O; also ESI channel 1 sensor excitation output and signal input, ESI test signal 1, ADC analog input A9, and comparator input C9. |+| 69 | P9.2/ESICH2/ESITEST2/A10/C10 | bidirectional | General-purpose digital I/O; also ESI channel 2 sensor excitation output and signal input, ESI test signal 2, ADC analog input A10, and comparator input C10. |+| 70 | P9.3/ESICH3/ESITEST3/A11/C11 | bidirectional | General-purpose digital I/O; also ESI channel 3 sensor excitation output and signal input, ESI test signal 3, ADC analog input A11, and comparator input C11. |+| 71 | P9.4/ESICI0/A12/C12 | bidirectional | General-purpose digital I/O; also ESI channel 0 signal input to comparator, ADC analog input A12, and comparator input C12. |+| 72 | P9.5/ESICI1/A13/C13 | bidirectional | General-purpose digital I/O; also ESI channel 1 signal input to comparator, ADC analog input A13, and comparator input C13. |+| 73 | P9.6/ESICI2/A14/C14 | bidirectional | General-purpose digital I/O; also ESI channel 2 signal input to comparator, ADC analog input A14, and comparator input C14. |+| 74 | P9.7/ESICI3/A15/C15 | bidirectional | General-purpose digital I/O; also ESI channel 3 signal input to comparator, ADC analog input A15, and comparator input C15. |+| 75 | ESIDVCC | power_in | ESI power supply; TI recommends powering it from the same source as DVCC and AVCC, with 1 µF plus 100 nF low-ESR decoupling close to the pin. |+| 76 | ESIDVSS | power_in | ESI ground supply; tie to VSS = 0 V. |+| 77 | ESICI | passive | ESI scan interface input to the comparator; leave open if unused. |+| 78 | ESICOM | passive | ESI common termination for scan interface sensors; leave open if unused. |+| 79 | AVCC1 | power_in | Analog power supply; VCC is 1.8 V to 3.6 V and AVCC must stay within ±0.3 V of DVCC. |+| 80 | AVSS3 | power_in | Analog ground supply; tie to VSS = 0 V. |+| 81 | PJ.7/HFXOUT | bidirectional | General-purpose digital I/O; output terminal of the high-frequency crystal oscillator XT2 when crystal mode is selected. |+| 82 | PJ.6/HFXIN | bidirectional | General-purpose digital I/O; input terminal for the high-frequency crystal oscillator XT2, which can also be driven by a clock in bypass mode. |+| 83 | AVSS1 | power_in | Analog ground supply; tie to VSS = 0 V. |+| 84 | PJ.4/LFXIN | bidirectional | General-purpose digital I/O; input terminal for the 32-kHz low-frequency crystal oscillator XT1, which can also be driven by a clock in bypass mode. |+| 85 | PJ.5/LFXOUT | bidirectional | General-purpose digital I/O; output terminal of the 32-kHz low-frequency crystal oscillator XT1 when crystal mode is selected. |+| 86 | AVSS2 | power_in | Analog ground supply; tie to VSS = 0 V. |+| 87 | P5.4/UCA1SIMO/UCA1TXD/S12 | bidirectional | General-purpose digital I/O; also USCI_A1 SPI slave-in/master-out or UART transmit, and LCD segment S12. |+| 88 | P5.5/UCA1SOMI/UCA1RXD/S11 | bidirectional | General-purpose digital I/O; also USCI_A1 SPI slave-out/master-in or UART receive, and LCD segment S11. |+| 89 | P5.6/UCA1CLK/S10 | bidirectional | General-purpose digital I/O; also USCI_A1 SPI clock and LCD segment S10. |+| 90 | P5.7/UCA1STE/TB0CLK/S9 | bidirectional | General-purpose digital I/O; also USCI_A1 SPI slave transmit enable, Timer_B TB0CLK clock input, and LCD segment S9. |+| 91 | P4.4/UCB1STE/TA1CLK/S8 | bidirectional | General-purpose digital I/O; also USCI_B1 SPI slave transmit enable, Timer_A TA1CLK clock input, and LCD segment S8. |+| 92 | P4.5/UCB1CLK/TA1.0/S7 | bidirectional | General-purpose digital I/O; also USCI_B1 SPI clock, Timer_A TA1 CCR0 capture/compare, and LCD segment S7. |+| 93 | P4.6/UCB1SIMO/UCB1SDA/TA1.1/S6 | bidirectional | General-purpose digital I/O; also USCI_B1 SPI slave-in/master-out or I2C data, Timer_A TA1 CCR1 capture/compare, and LCD segment S6. |+| 94 | P4.7/UCB1SOMI/UCB1SCL/TA1.2/S5 | bidirectional | General-purpose digital I/O; also USCI_B1 SPI slave-out/master-in or I2C clock, Timer_A TA1 CCR2 capture/compare, and LCD segment S5. |+| 95 | P10.0/SMCLK/S4 | bidirectional | General-purpose digital I/O; also SMCLK output and LCD segment S4. |+| 96 | P4.0/UCB1SIMO/UCB1SDA/MCLK/S3 | bidirectional | General-purpose digital I/O; also USCI_B1 SPI slave-in/master-out or I2C data, MCLK output, and LCD segment S3. |+| 97 | P4.1/UCB1SOMI/UCB1SCL/ACLK/S2 | bidirectional | General-purpose digital I/O; also USCI_B1 SPI slave-out/master-in or I2C clock, ACLK output, and LCD segment S2. |+| 98 | DVSS3 | power_in | Digital ground supply; tie to VSS = 0 V. |+| 99 | DVCC3 | power_in | Digital power supply; VCC is 1.8 V to 3.6 V and needs 1 µF plus 100 nF low-ESR decoupling close to the pin. |+| 100 | P4.2/UCA0SIMO/UCA0TXD/UCB1CLK | bidirectional | General-purpose digital I/O; also USCI_A0 SPI slave-in/master-out or UART transmit, and USCI_B1 clock input (SPI slave) or output (SPI master). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | LQFP-100(14x14) |+| Category | Single Chip Microcomputer/Microcontroller |+| Pins | 100 |++## CAD (KiCad official)++- Symbol: `MSP430FR69891IPZR`+- Footprint: `Package_QFP:LQFP-100_14x14mm_P0.5mm`+- 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)+- 3D model files: `msp430fr69891ipzr-etched.step` / `msp430fr69891ipzr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `msp430fr69891ipzr.step` / `msp430fr69891ipzr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/msp430fr5986) (190 pp, sha256 `868055019a26de9e`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/msp430fr69891ipzr-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "single chip microcomputer-microcontroller",+ "msp430fr69891ipzr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "msp430fr69891ipzr.kicad_sym",+ "msp430fr69891ipzr.kicad_mod",+ "msp430fr69891ipzr.glb",+ "msp430fr69891ipzr.step",+ "msp430fr69891ipzr.lbr",+ "docs/hero.png",+ "docs/msp430fr69891ipzr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "msp430fr69891ipzr-hero.glb",+ "msp430fr69891ipzr-hero.overlay.json"+ ],+ "component": {+ "mpn": "MSP430FR69891IPZR",+ "manufacturer": "Texas Instruments",+ "package": "LQFP-100(14x14)",+ "pin_count": 100,+ "category": "Single Chip Microcomputer/Microcontroller",+ "subcategory": "Microcontroller Units (MCUs/MPUs/SOCs)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/msp430fr5986",+ "parts": {+ "symbol": "msp430fr69891ipzr.kicad_sym",+ "footprint": "msp430fr69891ipzr.kicad_mod",+ "model_3d": "msp430fr69891ipzr-hero.glb",+ "model_3d_plain": "msp430fr69891ipzr.glb",+ "model_3d_step": "msp430fr69891ipzr-etched.step",+ "model_3d_step_plain": "msp430fr69891ipzr.step",+ "lbr": "msp430fr69891ipzr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2053765",+ "digikey": "296-51464-2-ND",+ "mouser": "595-SP430FR69891IPZR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T01:23:55Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-51464-2-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-SP430FR69891IPZR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "P4.3/UCA0SOMI/UCA0RXD/UCB1STE",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; alternates are USCI_A0 SPI slave-out/master-in or UART receive data, and USCI_B1 SPI slave transmit enable."+ },+ {+ "number": "2",+ "name": "P1.4/UCB0CLK/UCA0STE/TA1.0/S1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; alternates are USCI_B0 SPI clock, USCI_A0 SPI slave transmit enable, Timer_A TA1 CCR0 capture/compare, and LCD segment S1."+ },+ {+ "number": "3",+ "name": "P1.5/UCB0STE/UCA0CLK/TA0.0/S0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; alternates are USCI_B0 SPI slave transmit enable, USCI_A0 SPI clock, Timer_A TA0 CCR0 capture/compare, and LCD segment S0."+ },+ {+ "number": "4",+ "name": "P1.6/UCB0SIMO/UCB0SDA/TA0.1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; alternates are USCI_B0 SPI slave-in/master-out or I2C data, BSL data on I2C-BSL devices, and Timer_A TA0 CCR1 capture/compare."+ },+ {+ "number": "5",+ "name": "P1.7/UCB0SOMI/UCB0SCL/TA0.2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; alternates are USCI_B0 SPI slave-out/master-in or I2C clock, BSL clock on I2C-BSL devices, and Timer_A TA0 CCR2 capture/compare."+ },+ {+ "number": "6",+ "name": "R33/LCDCAP",+ "type": "passive",+ "description": "Input/output port of the most positive analog LCD voltage (V1) and LCD capacitor connection; if unused it can be tied to DVSS or DVCC."+ },+ {+ "number": "7",+ "name": "P6.0/R23",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and input/output port of the second most positive analog LCD voltage (V2)."+ },+ {+ "number": "8",+ "name": "P6.1/R13/LCDREF",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also input/output port of the third most positive LCD voltage (V3 or V4) and external reference input for regulated LCD voltage."+ },+ {+ "number": "9",+ "name": "P6.2/COUT/R03",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also comparator output and input/output port of the lowest analog LCD voltage (V5)."+ },+ {+ "number": "10",+ "name": "P6.3/COM0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also LCD common output COM0 for the LCD backplane."+ },+ {+ "number": "11",+ "name": "P6.4/TB0.0/COM1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_B TB0 CCR0 capture/compare and LCD common output COM1."+ },+ {+ "number": "12",+ "name": "P6.5/TB0.1/COM2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_B TB0 CCR1 capture/compare and LCD common output COM2."+ },+ {+ "number": "13",+ "name": "P6.6/TB0.2/COM3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_B TB0 CCR2 capture/compare and LCD common output COM3."+ },+ {+ "number": "14",+ "name": "P2.4/TB0.3/COM4/S43",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_B TB0 CCR3 capture/compare, LCD common output COM4, and LCD segment S43."+ },+ {+ "number": "15",+ "name": "P2.5/TB0.4/COM5/S42",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_B TB0 CCR4 capture/compare, LCD common output COM5, and LCD segment S42."+ },+ {+ "number": "16",+ "name": "P2.6/TB0.5/ESIC1OUT/COM6/S41",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_B TB0 CCR5 capture/compare, ESI comparator 1 output, LCD common output COM6, and LCD segment S41."+ },+ {+ "number": "17",+ "name": "P2.7/TB0.6/COM7/S40/ESIC2OUT",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_B TB0 CCR6 capture/compare, ESI comparator 2 output, LCD common output COM7, and LCD segment S40."+ },+ {+ "number": "18",+ "name": "P10.2/TA1.0/SMCLK/S39",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_A TA1 CCR0 capture/compare, SMCLK output, and LCD segment S39."+ },+ {+ "number": "19",+ "name": "P5.0/TA1.1/MCLK/S38",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_A TA1 CCR1 capture/compare, MCLK output, and LCD segment S38."+ },+ {+ "number": "20",+ "name": "P5.1/TA1.2/S37",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_A TA1 CCR2 capture/compare and LCD segment S37."+ },+ {+ "number": "21",+ "name": "P5.2/TA1.0/TA1CLK/ACLK/S36",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_A TA1 CCR0 capture/compare, TA1CLK clock input, ACLK output, and LCD segment S36."+ },+ {+ "number": "22",+ "name": "P5.3/UCB1STE/S35",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_B1 SPI slave transmit enable and LCD segment S35."+ },+ {+ "number": "23",+ "name": "P3.0/UCB1CLK/S34",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_B1 clock input (SPI slave) or output (SPI master) and LCD segment S34."+ },+ {+ "number": "24",+ "name": "P3.1/UCB1SIMO/UCB1SDA/S33",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_B1 SPI slave-in/master-out or I2C data, and LCD segment S33."+ },+ {+ "number": "25",+ "name": "P3.2/UCB1SOMI/UCB1SCL/S32",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_B1 SPI slave-out/master-in or I2C clock, and LCD segment S32."+ },+ {+ "number": "26",+ "name": "DVSS1",+ "type": "power_in",+ "description": "Digital ground supply; all DVSS, AVSS and ESIDVSS pins are referenced to VSS = 0 V."+ },+ {+ "number": "27",+ "name": "DVCC1",+ "type": "power_in",+ "description": "Digital power supply; VCC is 1.8 V to 3.6 V and each DVCC pin needs 1 µF plus 100 nF low-ESR ceramic decoupling placed close to the pin."+ },+ {+ "number": "28",+ "name": "TEST/SBWTCK",+ "type": "input",+ "description": "Test mode pin that selects digital I/O on the JTAG pins and serves as the Spy-Bi-Wire input clock; it always has an internal pulldown enabled and should be left open."+ },+ {+ "number": "29",+ "name": "RST/NMI/SBWTDIO",+ "type": "bidirectional",+ "description": "Active-low reset input, nonmaskable interrupt input, and Spy-Bi-Wire data input/output; if unused, use a 47-kΩ pullup or internal pullup with a 2.2-nF pulldown per Table 4-3."+ },+ {+ "number": "30",+ "name": "PJ.0/TDO/TB0OUTH/SMCLK/SRSCG1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; alternates are JTAG test data output TDO, Timer_B TB0OUTH high-impedance switch, SMCLK output, and CPU status register bit SCG1 for low-power debug."+ },+ {+ "number": "31",+ "name": "PJ.1/TDI/TCLK/MCLK/SRSCG0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; alternates are JTAG test data input or test clock (TDI/TCLK), MCLK output, and CPU status register bit SCG0 for low-power debug."+ },+ {+ "number": "32",+ "name": "PJ.2/TMS/ACLK/SROSCOFF",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; alternates are JTAG test mode select TMS, ACLK output, and CPU status register bit OSCOFF for low-power debug."+ },+ {+ "number": "33",+ "name": "PJ.3/TCK/COUT/SRCPUOFF",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; alternates are JTAG test clock TCK, comparator output COUT, and CPU status register bit CPUOFF for low-power debug."+ },+ {+ "number": "34",+ "name": "P6.7/TA0CLK/S31",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_A TA0CLK clock input and LCD segment S31."+ },+ {+ "number": "35",+ "name": "P7.5/TA0.2/S30",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_A TA0 CCR2 capture/compare and LCD segment S30."+ },+ {+ "number": "36",+ "name": "P7.6/TA0.1/S29",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_A TA0 CCR1 capture/compare and LCD segment S29."+ },+ {+ "number": "37",+ "name": "P10.1/TA0.0/S28",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_A TA0 CCR0 capture/compare and LCD segment S28."+ },+ {+ "number": "38",+ "name": "P7.7/TA1.2/TB0OUTH/S27",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_A TA1 CCR2 capture/compare, Timer_B TB0OUTH high-impedance switch input, and LCD segment S27."+ },+ {+ "number": "39",+ "name": "P3.3/TA1.1/TB0CLK/S26",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_A TA1 CCR1 capture/compare, Timer_B TB0CLK clock input, and LCD segment S26."+ },+ {+ "number": "40",+ "name": "P3.4/UCA1SIMO/UCA1TXD/TB0.0/S25",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_A1 SPI slave-in/master-out or UART transmit, Timer_B TB0 CCR0 capture/compare, and LCD segment S25."+ },+ {+ "number": "41",+ "name": "P3.5/UCA1SOMI/UCA1RXD/TB0.1/S24",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_A1 SPI slave-out/master-in or UART receive, Timer_B TB0 CCR1 capture/compare, and LCD segment S24."+ },+ {+ "number": "42",+ "name": "P3.6/UCA1CLK/TB0.2/S23",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_A1 SPI clock, Timer_B TB0 CCR2 capture/compare, and LCD segment S23."+ },+ {+ "number": "43",+ "name": "P3.7/UCA1STE/TB0.3/S22",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_A1 SPI slave transmit enable, Timer_B TB0 CCR3 capture/compare, and LCD segment S22."+ },+ {+ "number": "44",+ "name": "P8.0/RTCCLK/S21",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also RTC clock output for calibration and LCD segment S21."+ },+ {+ "number": "45",+ "name": "P8.1/DMAE0/S20",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also DMA external trigger input and LCD segment S20."+ },+ {+ "number": "46",+ "name": "P8.2/S19",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment S19."+ },+ {+ "number": "47",+ "name": "P8.3/MCLK/S18",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also MCLK output and LCD segment S18."+ },+ {+ "number": "48",+ "name": "P2.3/UCA0STE/TB0OUTH",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_A0 SPI slave transmit enable, Timer_B TB0OUTH high-impedance switch input, and LCD segment S17."+ },+ {+ "number": "49",+ "name": "P2.2/UCA0CLK/TB0.4/RTCCLK",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_A0 SPI clock, Timer_B TB0 CCR4 capture/compare, RTC clock output for calibration, and LCD segment S16."+ },+ {+ "number": "50",+ "name": "P2.1/UCA0SOMI/UCA0RXD/TB0.5/DMAE0/S15",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_A0 SPI slave-out/master-in or UART receive, UART BSL receive, Timer_B TB0 CCR5 capture/compare, DMA external trigger input, and LCD segment S15."+ },+ {+ "number": "51",+ "name": "P2.0/UCA0SIMO/UCA0TXD/TB0.6/TB0CLK/S14",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_A0 SPI slave-in/master-out or UART transmit, UART BSL transmit, Timer_B TB0 CCR6 capture/compare, TB0CLK clock input, and LCD segment S14."+ },+ {+ "number": "52",+ "name": "P7.0/TA0CLK/S17",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_A TA0CLK clock input and LCD segment S17."+ },+ {+ "number": "53",+ "name": "P7.1/TA0.0/ACLK/S16",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_A TA0 CCR0 capture/compare, ACLK output, and LCD segment S16."+ },+ {+ "number": "54",+ "name": "P7.2/TA0.1/S15",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_A TA0 CCR1 capture/compare and LCD segment S15."+ },+ {+ "number": "55",+ "name": "P7.3/TA0.2/S14",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_A TA0 CCR2 capture/compare and LCD segment S14."+ },+ {+ "number": "56",+ "name": "P7.4/SMCLK/S13",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also SMCLK output and LCD segment S13."+ },+ {+ "number": "57",+ "name": "DVSS2",+ "type": "power_in",+ "description": "Digital ground supply; tie to VSS = 0 V."+ },+ {+ "number": "58",+ "name": "DVCC2",+ "type": "power_in",+ "description": "Digital power supply; VCC is 1.8 V to 3.6 V and needs 1 µF plus 100 nF low-ESR decoupling close to the pin."+ },+ {+ "number": "59",+ "name": "P8.4/A7/C7",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also ADC analog input A7 and comparator input C7."+ },+ {+ "number": "60",+ "name": "P8.5/A6/C6",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also ADC analog input A6 and comparator input C6."+ },+ {+ "number": "61",+ "name": "P8.6/A5/C5",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also ADC analog input A5 and comparator input C5."+ },+ {+ "number": "62",+ "name": "P8.7/A4/C4",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also ADC analog input A4 and comparator input C4."+ },+ {+ "number": "63",+ "name": "P1.3/TA1.2/ESITEST4/A3/C3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also ESI test signal 4, Timer_A TA1 CCR2 capture/compare, ADC analog input A3, and comparator input C3."+ },+ {+ "number": "64",+ "name": "P1.2/TA1.1/TA0CLK/COUT/A2/C2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_A TA1 CCR1 capture/compare, TA0CLK clock input, comparator output COUT, ADC analog input A2, and comparator input C2."+ },+ {+ "number": "65",+ "name": "P1.1/TA0.2/TA1CLK/COUT/A1/C1/VREF+/VeREF+",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_A TA0 CCR2 capture/compare, TA1CLK clock input, comparator output COUT, ADC analog input A1, comparator input C1, and positive reference voltage output or external positive reference input to the ADC."+ },+ {+ "number": "66",+ "name": "P1.0/TA0.1/DMAE0/RTCCLK/A0/C0/VREF-/VeREF-",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also Timer_A TA0 CCR1 capture/compare, DMA external trigger input, RTC clock output for calibration, ADC analog input A0, comparator input C0, and negative reference voltage output or external negative reference input to the ADC."+ },+ {+ "number": "67",+ "name": "P9.0/ESICH0/ESITEST0/A8/C8",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also ESI channel 0 sensor excitation output and signal input, ESI test signal 0, ADC analog input A8, and comparator input C8."+ },+ {+ "number": "68",+ "name": "P9.1/ESICH1/ESITEST1/A9/C9",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also ESI channel 1 sensor excitation output and signal input, ESI test signal 1, ADC analog input A9, and comparator input C9."+ },+ {+ "number": "69",+ "name": "P9.2/ESICH2/ESITEST2/A10/C10",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also ESI channel 2 sensor excitation output and signal input, ESI test signal 2, ADC analog input A10, and comparator input C10."+ },+ {+ "number": "70",+ "name": "P9.3/ESICH3/ESITEST3/A11/C11",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also ESI channel 3 sensor excitation output and signal input, ESI test signal 3, ADC analog input A11, and comparator input C11."+ },+ {+ "number": "71",+ "name": "P9.4/ESICI0/A12/C12",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also ESI channel 0 signal input to comparator, ADC analog input A12, and comparator input C12."+ },+ {+ "number": "72",+ "name": "P9.5/ESICI1/A13/C13",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also ESI channel 1 signal input to comparator, ADC analog input A13, and comparator input C13."+ },+ {+ "number": "73",+ "name": "P9.6/ESICI2/A14/C14",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also ESI channel 2 signal input to comparator, ADC analog input A14, and comparator input C14."+ },+ {+ "number": "74",+ "name": "P9.7/ESICI3/A15/C15",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also ESI channel 3 signal input to comparator, ADC analog input A15, and comparator input C15."+ },+ {+ "number": "75",+ "name": "ESIDVCC",+ "type": "power_in",+ "description": "ESI power supply; TI recommends powering it from the same source as DVCC and AVCC, with 1 µF plus 100 nF low-ESR decoupling close to the pin."+ },+ {+ "number": "76",+ "name": "ESIDVSS",+ "type": "power_in",+ "description": "ESI ground supply; tie to VSS = 0 V."+ },+ {+ "number": "77",+ "name": "ESICI",+ "type": "passive",+ "description": "ESI scan interface input to the comparator; leave open if unused."+ },+ {+ "number": "78",+ "name": "ESICOM",+ "type": "passive",+ "description": "ESI common termination for scan interface sensors; leave open if unused."+ },+ {+ "number": "79",+ "name": "AVCC1",+ "type": "power_in",+ "description": "Analog power supply; VCC is 1.8 V to 3.6 V and AVCC must stay within ±0.3 V of DVCC."+ },+ {+ "number": "80",+ "name": "AVSS3",+ "type": "power_in",+ "description": "Analog ground supply; tie to VSS = 0 V."+ },+ {+ "number": "81",+ "name": "PJ.7/HFXOUT",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; output terminal of the high-frequency crystal oscillator XT2 when crystal mode is selected."+ },+ {+ "number": "82",+ "name": "PJ.6/HFXIN",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; input terminal for the high-frequency crystal oscillator XT2, which can also be driven by a clock in bypass mode."+ },+ {+ "number": "83",+ "name": "AVSS1",+ "type": "power_in",+ "description": "Analog ground supply; tie to VSS = 0 V."+ },+ {+ "number": "84",+ "name": "PJ.4/LFXIN",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; input terminal for the 32-kHz low-frequency crystal oscillator XT1, which can also be driven by a clock in bypass mode."+ },+ {+ "number": "85",+ "name": "PJ.5/LFXOUT",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; output terminal of the 32-kHz low-frequency crystal oscillator XT1 when crystal mode is selected."+ },+ {+ "number": "86",+ "name": "AVSS2",+ "type": "power_in",+ "description": "Analog ground supply; tie to VSS = 0 V."+ },+ {+ "number": "87",+ "name": "P5.4/UCA1SIMO/UCA1TXD/S12",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_A1 SPI slave-in/master-out or UART transmit, and LCD segment S12."+ },+ {+ "number": "88",+ "name": "P5.5/UCA1SOMI/UCA1RXD/S11",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_A1 SPI slave-out/master-in or UART receive, and LCD segment S11."+ },+ {+ "number": "89",+ "name": "P5.6/UCA1CLK/S10",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_A1 SPI clock and LCD segment S10."+ },+ {+ "number": "90",+ "name": "P5.7/UCA1STE/TB0CLK/S9",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_A1 SPI slave transmit enable, Timer_B TB0CLK clock input, and LCD segment S9."+ },+ {+ "number": "91",+ "name": "P4.4/UCB1STE/TA1CLK/S8",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_B1 SPI slave transmit enable, Timer_A TA1CLK clock input, and LCD segment S8."+ },+ {+ "number": "92",+ "name": "P4.5/UCB1CLK/TA1.0/S7",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_B1 SPI clock, Timer_A TA1 CCR0 capture/compare, and LCD segment S7."+ },+ {+ "number": "93",+ "name": "P4.6/UCB1SIMO/UCB1SDA/TA1.1/S6",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_B1 SPI slave-in/master-out or I2C data, Timer_A TA1 CCR1 capture/compare, and LCD segment S6."+ },+ {+ "number": "94",+ "name": "P4.7/UCB1SOMI/UCB1SCL/TA1.2/S5",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_B1 SPI slave-out/master-in or I2C clock, Timer_A TA1 CCR2 capture/compare, and LCD segment S5."+ },+ {+ "number": "95",+ "name": "P10.0/SMCLK/S4",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also SMCLK output and LCD segment S4."+ },+ {+ "number": "96",+ "name": "P4.0/UCB1SIMO/UCB1SDA/MCLK/S3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_B1 SPI slave-in/master-out or I2C data, MCLK output, and LCD segment S3."+ },+ {+ "number": "97",+ "name": "P4.1/UCB1SOMI/UCB1SCL/ACLK/S2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_B1 SPI slave-out/master-in or I2C clock, ACLK output, and LCD segment S2."+ },+ {+ "number": "98",+ "name": "DVSS3",+ "type": "power_in",+ "description": "Digital ground supply; tie to VSS = 0 V."+ },+ {+ "number": "99",+ "name": "DVCC3",+ "type": "power_in",+ "description": "Digital power supply; VCC is 1.8 V to 3.6 V and needs 1 µF plus 100 nF low-ESR decoupling close to the pin."+ },+ {+ "number": "100",+ "name": "P4.2/UCA0SIMO/UCA0TXD/UCB1CLK",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; also USCI_A0 SPI slave-in/master-out or UART transmit, and USCI_B1 clock input (SPI slave) or output (SPI master)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Package scope: the PZ (LQFP-100, 14 mm x 14 mm) pinout is the 100-pin figure and Table 4-1 PZ column; Pin type assignment: the datasheet does not assign ERC types. GPIO and multiplexed pins are typed bi; LCD segment labels (Sx) are package-specific. Segment numbers shown are the PZ-package assignments f"+ ],+ "pages_sent": 78,+ "cost_usd": 0.4847,+ "at": "2026-10-08T01:23:20"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/msp430fr5986",+ "pages": 190,+ "sha256": "868055019a26de9e",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 100,+ "described": 100,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "msp430fr69891ipzr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 16,+ 16,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "51720097260ffba41c3062f85f67623721102fa535901c47cb555a1f444feeb3",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "msp430fr69891ipzr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 16,+ 16,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "9b8faa2acf0c7eb2c570b8ce96be875cf5b86602311c111caf0e25b22ad5a320",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}