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MSP430FR59691IRGZT
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Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+86@@ -0,0 +1,86 @@+# MSP430FR59691IRGZT++**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · VQFN-48-EP(7x7)++MSP430FR59691IRGZT from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | P1.0/TA0.1/DMAE0/RTCCLK/A0/C0/VREF-/VeREF- | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TA0 CCR1 capture/compare, external DMA trigger DMAE0, RTC clock calibration output RTCCLK, ADC input A0, comparator input C0, and VREF-/VeREF- reference output/input. |+| 2 | P1.1/TA0.2/TA1CLK/COUT/A1/C1/VREF+/VeREF+ | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TA0 CCR2 capture/compare, TA1 input clock, comparator output COUT, ADC input A1, comparator input C1, and VREF+/VeREF+ reference output/input. |+| 3 | P1.2/TA1.1/TA0CLK/COUT/A2/C2 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TA1 CCR1 capture/compare, TA0 input clock, comparator output COUT, ADC input A2, and comparator input C2. |+| 4 | P3.0/A12/C12 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with ADC input A12 and comparator input C12. |+| 5 | P3.1/A13/C13 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with ADC input A13 and comparator input C13. |+| 6 | P3.2/A14/C14 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with ADC input A14 and comparator input C14. |+| 7 | P3.3/A15/C15 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with ADC input A15 and comparator input C15. |+| 8 | P4.7 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; this pin exists only in the 48-pin RGZ package. |+| 9 | P1.3/TA1.2/UCB0STE/A3/C3 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TA1 CCR2 capture/compare, eUSCI_B0 SPI slave transmit enable UCB0STE, ADC input A3, and comparator input C3. |+| 10 | P1.4/TB0.1/UCA0STE/A4/C4 | bidirectional | General-purpose digital I/O, also multiplexed with TB0 CCR1 capture/compare, eUSCI_A0 SPI STE UCA0STE, ADC input A4, and comparator input C4. |+| 11 | P1.5/TB0.2/UCA0CLK/A5/C5 | bidirectional | General-purpose digital I/O, also multiplexed with TB0 CCR2 capture/compare, eUSCI_A0 clock UCA0CLK, ADC input A5, and comparator input C5. |+| 12 | PJ.0/TDO/TB0OUTH/SMCLK/SRSCG1/C6 | bidirectional | General-purpose digital I/O that serves as JTAG TDO when JTAG is active, and is also multiplexed with TB0OUTH, SMCLK output, CPU status bit SCG1, and comparator input C6. |+| 13 | PJ.1/TDI/TCLK/MCLK/SRSCG0/C7 | bidirectional | General-purpose digital I/O that serves as JTAG TDI/TCLK when JTAG is active, and is also multiplexed with MCLK output, CPU status bit SCG0, and comparator input C7. |+| 14 | PJ.2/TMS/ACLK/SROSCOFF/C8 | bidirectional | General-purpose digital I/O that serves as JTAG TMS when JTAG is active, and is also multiplexed with ACLK output, CPU status bit OSCOFF, and comparator input C8. |+| 15 | PJ.3/TCK/SRCPUOFF/C9 | bidirectional | General-purpose digital I/O that serves as JTAG TCK when JTAG is active, and is also multiplexed with CPU status bit CPUOFF and comparator input C9. |+| 16 | P4.0/A8 | bidirectional | General-purpose digital I/O, or ADC analog input A8 when the analog function is selected. |+| 17 | P4.1/A9 | bidirectional | General-purpose digital I/O, or ADC analog input A9 when the analog function is selected. |+| 18 | P4.2/A10 | bidirectional | General-purpose digital I/O, or ADC analog input A10 when the analog function is selected. |+| 19 | P4.3/A11 | bidirectional | General-purpose digital I/O, or ADC analog input A11 when the analog function is selected. |+| 20 | P2.5/TB0.0/UCA1TXD/UCA1SIMO | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR0 capture/compare and eUSCI_A1 UART TX / SPI SIMO. |+| 21 | P2.6/TB0.1/UCA1RXD/UCA1SOMI | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR1 capture/compare and eUSCI_A1 UART RX / SPI SOMI. |+| 22 | TEST/SBWTCK | input | Test mode pin that is used as the Spy-Bi-Wire clock SBWTCK, and it always has an internal pulldown enabled, so it should be left open when unused. |+| 23 | RST/NMI/SBWTDIO | bidirectional | Reset/NMI pin that is also the Spy-Bi-Wire data pin SBWTDIO; if unused, use a 47-kΩ pullup to DVCC or the internal pullup with a 2.2-nF (10-nF if no JTAG/SBW access needed) pulldown. |+| 24 | P2.0/TB0.6/UCA0TXD/UCA0SIMO/TB0CLK/ACLK | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR6, eUSCI_A0 UART TX / SPI SIMO, TB0CLK input, and ACLK output; this I2C-BSL device does not use this pin for BSL. |+| 25 | P2.1/TB0.0/UCA0RXD/UCA0SOMI/TB0.0 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR0 capture/compare and eUSCI_A0 UART RX / SPI SOMI; this I2C-BSL device does not use this pin for BSL. |+| 26 | P2.2/TB0.2/UCB0CLK | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR2 capture/compare and eUSCI_B0 clock UCB0CLK. |+| 27 | P3.4/TB0.3/SMCLK | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR3 capture/compare and SMCLK output. |+| 28 | P3.5/TB0.4/COUT | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR4 capture/compare and comparator output COUT. |+| 29 | P3.6/TB0.5 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR5 capture/compare. |+| 30 | P3.7/TB0.6 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR6 capture/compare. |+| 31 | P1.6/TB0.3/UCB0SIMO/UCB0SDA/TA0.0 | bidirectional | General-purpose digital I/O, also multiplexed with TB0 CCR3 capture/compare, eUSCI_B0 SPI SIMO / I2C SDA, and TA0 CCR0 capture/compare; on I2C-BSL devices (this MPN) it is BSLSDA. |+| 32 | P1.7/TB0.4/UCB0SOMI/UCB0SCL/TA1.0 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR4 capture/compare, eUSCI_B0 SPI SOMI / I2C SCL, and TA1 CCR0 capture/compare; on I2C-BSL devices (this MPN) it is BSLSCL. |+| 33 | P4.4/TB0.5 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR5 capture/compare input and output. |+| 34 | P4.5 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; this pin exists only in the 48-pin RGZ package. |+| 35 | P4.6 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; this pin exists only in the 48-pin RGZ package. |+| 36 | DVSS | power_in | Digital ground supply. |+| 37 | DVCC | power_in | Digital power supply, which must stay within 0.3 V of AVCC and be decoupled with at least 1 µF (plus 100 nF recommended) placed close to the pin. |+| 38 | P2.7 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, with no alternate peripheral function listed in the pin-function table. |+| 39 | P2.3/TA0.0/UCA1STE/A6/C10 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TA0 CCR0 capture/compare, eUSCI_A1 SPI slave transmit enable UCA1STE, ADC input A6, and comparator input C10. |+| 40 | P2.4/TA1.0/UCA1CLK/A7/C11 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TA1 CCR0 capture/compare, eUSCI_A1 clock UCA1CLK, ADC input A7, and comparator input C11. |+| 41 | AVSS | power_in | Analog ground supply. |+| 42 | PJ.6/HFXIN | bidirectional | General-purpose digital I/O, or input for the high-frequency crystal oscillator HFXT (or HFXT bypass clock input when bypass mode is selected). |+| 43 | PJ.7/HFXOUT | bidirectional | General-purpose digital I/O, or output for the high-frequency crystal oscillator HFXT (general-purpose I/O when HFXT bypass mode is selected). |+| 44 | AVSS | power_in | Analog ground supply. |+| 45 | PJ.4/LFXIN | bidirectional | General-purpose digital I/O, or input for the low-frequency 32-kHz crystal oscillator LFXT (or LFXT bypass clock input when bypass mode is selected). |+| 46 | PJ.5/LFXOUT | bidirectional | General-purpose digital I/O, or output of the low-frequency crystal oscillator LFXT (general-purpose I/O when LFXT bypass mode is selected). |+| 47 | AVSS | power_in | Analog ground supply. |+| 48 | AVCC | power_in | Analog power supply, which must stay within 0.3 V of DVCC and be decoupled with at least 1 µF plus 100 nF. |+| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-48-EP(7x7) |+| Category | Embedded Processors & Controllers |+| Pins | 49 |++## CAD (KiCad official)++- Symbol: `MSP430FR59691IRGZT`+- Footprint: `Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm`+- 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)+- 3D model files: `msp430fr59691irgzt-etched.step` / `msp430fr59691irgzt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `msp430fr59691irgzt.step` / `msp430fr59691irgzt.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/msp430fr5949) (147 pp, sha256 `0f6fc294c2100c31`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/msp430fr59691irgzt-datasheet.pdf)
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this pin exists only in the 48-pin RGZ package."+ },+ {+ "number": "9",+ "name": "P1.3/TA1.2/UCB0STE/A3/C3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TA1 CCR2 capture/compare, eUSCI_B0 SPI slave transmit enable UCB0STE, ADC input A3, and comparator input C3."+ },+ {+ "number": "10",+ "name": "P1.4/TB0.1/UCA0STE/A4/C4",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, also multiplexed with TB0 CCR1 capture/compare, eUSCI_A0 SPI STE UCA0STE, ADC input A4, and comparator input C4."+ },+ {+ "number": "11",+ "name": "P1.5/TB0.2/UCA0CLK/A5/C5",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, also multiplexed with TB0 CCR2 capture/compare, eUSCI_A0 clock UCA0CLK, ADC input A5, and comparator input C5."+ },+ {+ "number": "12",+ "name": "PJ.0/TDO/TB0OUTH/SMCLK/SRSCG1/C6",+ "type": "bidirectional",+ "description": "General-purpose digital I/O that serves as JTAG TDO when JTAG is active, and is also multiplexed with TB0OUTH, SMCLK output, CPU status bit SCG1, and comparator input C6."+ },+ {+ "number": "13",+ "name": "PJ.1/TDI/TCLK/MCLK/SRSCG0/C7",+ "type": "bidirectional",+ "description": "General-purpose digital I/O that serves as JTAG TDI/TCLK when JTAG is active, and is also multiplexed with MCLK output, CPU status bit SCG0, and comparator input C7."+ },+ {+ "number": "14",+ "name": "PJ.2/TMS/ACLK/SROSCOFF/C8",+ "type": "bidirectional",+ "description": "General-purpose digital I/O that serves as JTAG TMS when JTAG is active, and is also multiplexed with ACLK output, CPU status bit OSCOFF, and comparator input C8."+ },+ {+ "number": "15",+ "name": "PJ.3/TCK/SRCPUOFF/C9",+ "type": "bidirectional",+ "description": "General-purpose digital I/O that serves as JTAG TCK when JTAG is active, and is also multiplexed with CPU status bit CPUOFF and comparator input C9."+ },+ {+ "number": "16",+ "name": "P4.0/A8",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, or ADC analog input A8 when the analog function is selected."+ },+ {+ "number": "17",+ "name": "P4.1/A9",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, or ADC analog input A9 when the analog function is selected."+ },+ {+ "number": "18",+ "name": "P4.2/A10",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, or ADC analog input A10 when the analog function is selected."+ },+ {+ "number": "19",+ "name": "P4.3/A11",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, or ADC analog input A11 when the analog function is selected."+ },+ {+ "number": "20",+ "name": "P2.5/TB0.0/UCA1TXD/UCA1SIMO",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR0 capture/compare and eUSCI_A1 UART TX / SPI SIMO."+ },+ {+ "number": "21",+ "name": "P2.6/TB0.1/UCA1RXD/UCA1SOMI",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR1 capture/compare and eUSCI_A1 UART RX / SPI SOMI."+ },+ {+ "number": "22",+ "name": "TEST/SBWTCK",+ "type": "input",+ "description": "Test mode pin that is used as the Spy-Bi-Wire clock SBWTCK, and it always has an internal pulldown enabled, so it should be left open when unused."+ },+ {+ "number": "23",+ "name": "RST/NMI/SBWTDIO",+ "type": "bidirectional",+ "description": "Reset/NMI pin that is also the Spy-Bi-Wire data pin SBWTDIO; if unused, use a 47-kΩ pullup to DVCC or the internal pullup with a 2.2-nF (10-nF if no JTAG/SBW access needed) pulldown."+ },+ {+ "number": "24",+ "name": "P2.0/TB0.6/UCA0TXD/UCA0SIMO/TB0CLK/ACLK",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR6, eUSCI_A0 UART TX / SPI SIMO, TB0CLK input, and ACLK output; this I2C-BSL device does not use this pin for BSL."+ },+ {+ "number": "25",+ "name": "P2.1/TB0.0/UCA0RXD/UCA0SOMI/TB0.0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR0 capture/compare and eUSCI_A0 UART RX / SPI SOMI; this I2C-BSL device does not use this pin for BSL."+ },+ {+ "number": "26",+ "name": "P2.2/TB0.2/UCB0CLK",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR2 capture/compare and eUSCI_B0 clock UCB0CLK."+ },+ {+ "number": "27",+ "name": "P3.4/TB0.3/SMCLK",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR3 capture/compare and SMCLK output."+ },+ {+ "number": "28",+ "name": "P3.5/TB0.4/COUT",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR4 capture/compare and comparator output COUT."+ },+ {+ "number": "29",+ "name": "P3.6/TB0.5",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR5 capture/compare."+ },+ {+ "number": "30",+ "name": "P3.7/TB0.6",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR6 capture/compare."+ },+ {+ "number": "31",+ "name": "P1.6/TB0.3/UCB0SIMO/UCB0SDA/TA0.0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, also multiplexed with TB0 CCR3 capture/compare, eUSCI_B0 SPI SIMO / I2C SDA, and TA0 CCR0 capture/compare; on I2C-BSL devices (this MPN) it is BSLSDA."+ },+ {+ "number": "32",+ "name": "P1.7/TB0.4/UCB0SOMI/UCB0SCL/TA1.0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR4 capture/compare, eUSCI_B0 SPI SOMI / I2C SCL, and TA1 CCR0 capture/compare; on I2C-BSL devices (this MPN) it is BSLSCL."+ },+ {+ "number": "33",+ "name": "P4.4/TB0.5",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TB0 CCR5 capture/compare input and output."+ },+ {+ "number": "34",+ "name": "P4.5",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5; this pin exists only in the 48-pin RGZ package."+ },+ {+ "number": "35",+ "name": "P4.6",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5; this pin exists only in the 48-pin RGZ package."+ },+ {+ "number": "36",+ "name": "DVSS",+ "type": "power_in",+ "description": "Digital ground supply."+ },+ {+ "number": "37",+ "name": "DVCC",+ "type": "power_in",+ "description": "Digital power supply, which must stay within 0.3 V of AVCC and be decoupled with at least 1 µF (plus 100 nF recommended) placed close to the pin."+ },+ {+ "number": "38",+ "name": "P2.7",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, with no alternate peripheral function listed in the pin-function table."+ },+ {+ "number": "39",+ "name": "P2.3/TA0.0/UCA1STE/A6/C10",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TA0 CCR0 capture/compare, eUSCI_A1 SPI slave transmit enable UCA1STE, ADC input A6, and comparator input C10."+ },+ {+ "number": "40",+ "name": "P2.4/TA1.0/UCA1CLK/A7/C11",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also multiplexed with TA1 CCR0 capture/compare, eUSCI_A1 clock UCA1CLK, ADC input A7, and comparator input C11."+ },+ {+ "number": "41",+ "name": "AVSS",+ "type": "power_in",+ "description": "Analog ground supply."+ },+ {+ "number": "42",+ "name": "PJ.6/HFXIN",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, or input for the high-frequency crystal oscillator HFXT (or HFXT bypass clock input when bypass mode is selected)."+ },+ {+ "number": "43",+ "name": "PJ.7/HFXOUT",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, or output for the high-frequency crystal oscillator HFXT (general-purpose I/O when HFXT bypass mode is selected)."+ },+ {+ "number": "44",+ "name": "AVSS",+ "type": "power_in",+ "description": "Analog ground supply."+ },+ {+ "number": "45",+ "name": "PJ.4/LFXIN",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, or input for the low-frequency 32-kHz crystal oscillator LFXT (or LFXT bypass clock input when bypass mode is selected)."+ },+ {+ "number": "46",+ "name": "PJ.5/LFXOUT",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, or output of the low-frequency crystal oscillator LFXT (general-purpose I/O when LFXT bypass mode is selected)."+ },+ {+ "number": "47",+ "name": "AVSS",+ "type": "power_in",+ "description": "Analog ground supply."+ },+ {+ "number": "48",+ "name": "AVCC",+ "type": "power_in",+ "description": "Analog power supply, which must stay within 0.3 V of DVCC and be decoupled with at least 1 µF plus 100 nF."+ },+ {+ "number": "49",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The QFN exposed thermal pad is listed in Table 4-1 as 'QFN Pad' (not a numbered terminal). It is exc; Table 4-1 rows for pages 13-14 were not in the supplied text. Descriptions for these pins were built; Pin 10 label was inferred. The Figure 4-1 text extraction shows the P1.4 label without a clear numbe",+ "exposed pad 49 added from the footprint",+ "18/49 pins cited to the wrong page (name found elsewhere): ['10:P1.4/TB0.1/UCA0STE/A4/C4@p88', '13:PJ.1/TDI/TCLK/MCLK/SRSCG0/C7@p111', '14:PJ.2/TMS/ACLK/SROSCOFF/C8@p111', '16:P4.0/A8@p101']"+ ],+ "pages_sent": 56,+ "cost_usd": 0.3356,+ "at": "2026-10-08T14:53:01"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/msp430fr5949",+ "pages": 147,+ "sha256": "0f6fc294c2100c31",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 49,+ "described": 49,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "msp430fr59691irgzt.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7,+ 7,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "msp430fr59691irgzt-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7,+ 7,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "6ab01e13c83427f973b87c30e7351027be3dced0596774716ee4eb6b015270bd",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}