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MSP430FR2673TRHBR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), HVQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+70@@ -0,0 +1,70 @@+# MSP430FR2673TRHBR++**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · HVQFN-32-EP(5x5)++MSP430FR2673TRHBR from Texas Instruments, in a HVQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | RST/NMI/SBWTDIO | input | Active-low reset input (RST), nonmaskable interrupt input (NMI), or Spy-Bi-Wire data input/output (SBWTDIO) |+| 2 | TEST/SBWTCK | input | Test mode pin (TEST) for JTAG or Spy-Bi-Wire clock input (SBWTCK) |+| 3 | P1.4 | bidirectional | GPIO P1.4 with port interrupt and LPMx.5 wake capability; alternate functions: UCA0TXD/SIMO, TA1.2, TCK, A4 ADC, or VREF+ output |+| 4 | P1.5 | bidirectional | GPIO P1.5 with port interrupt and LPMx.5 wake capability; alternate functions: UCA0RXD/SOMI, TA1.1, TMS, or A5 ADC |+| 5 | P1.6 | bidirectional | GPIO P1.6 with port interrupt and LPMx.5 wake capability; alternate functions: UCA0CLK, TA1CLK, TDI, TCLK, or A6 ADC |+| 6 | P1.7 | bidirectional | GPIO P1.7 with port interrupt and LPMx.5 wake capability; alternate functions: UCA0STE, SMCLK output, TDO, or A7 ADC |+| 7 | P1.0 | bidirectional | GPIO P1.0 with port interrupt and LPMx.5 wake capability; alternate functions: UCB0STE, TA0CLK, A0 ADC, or Veref+ reference input |+| 8 | P1.1 | bidirectional | GPIO P1.1 with port interrupt and LPMx.5 wake capability; alternate functions: UCB0CLK, TA0.1 capture/compare, COMP0.0, or A1 ADC |+| 9 | P1.2 | bidirectional | GPIO P1.2 with port interrupt and LPMx.5 wake capability; alternate functions: UCB0SIMO/SDA, TA0.2, A2 ADC, or Veref- reference input |+| 10 | P1.3 | bidirectional | GPIO P1.3 with port interrupt and LPMx.5 wake capability; alternate functions: UCB0SOMI/SCL, MCLK output, or A3 ADC |+| 11 | P2.2 | bidirectional | GPIO P2.2 with port interrupt and LPMx.5 wake capability; alternate functions: SYNC input, ACLK output, or COMP0.1 input |+| 12 | P3.0 | bidirectional | GPIO P3.0 with port interrupt and LPMx.5 wake capability; alternate functions: TA2.2 capture/compare or CAP0.0 CapTIvate input/output |+| 13 | P3.3 | bidirectional | GPIO P3.3 with port interrupt and LPMx.5 wake capability; alternate functions: TA2.1 capture/compare or CAP0.1 CapTIvate input/output |+| 14 | P2.3 | bidirectional | GPIO P2.3 with port interrupt and LPMx.5 wake capability; alternate functions: TA2.0 capture/compare or CAP0.2 CapTIvate input/output |+| 15 | P3.4 | bidirectional | GPIO P3.4 with port interrupt and LPMx.5 wake capability; alternate functions: TA2CLK input, COMP0OUT output, or CAP0.3 CapTIvate input/output |+| 16 | P3.1 | bidirectional | GPIO P3.1 with port interrupt and LPMx.5 wake capability; alternate functions: UCA1STE or CAP1.0 CapTIvate input/output |+| 17 | P2.4 | bidirectional | GPIO P2.4 with port interrupt and LPMx.5 wake capability; alternate functions: UCA1CLK or CAP1.1 CapTIvate input/output |+| 18 | P2.5 | bidirectional | GPIO P2.5 with port interrupt and LPMx.5 wake capability; alternate functions: UCA1RXD/SOMI or CAP1.2 CapTIvate input/output |+| 19 | P2.6 | bidirectional | GPIO P2.6 with port interrupt and LPMx.5 wake capability; alternate functions: UCA1TXD/SIMO or CAP1.3 CapTIvate input/output |+| 20 | VREG | power_out | CapTIvate regulator output for external 1 µF decoupling capacitor (ESR ≤ 200 mΩ) after 260 µs warm-up time |+| 21 | P3.7 | bidirectional | GPIO P3.7 with port interrupt and LPMx.5 wake capability; alternate functions: TA3.2 capture/compare or CAP2.0 CapTIvate input/output |+| 22 | P4.0 | bidirectional | GPIO P4.0 with port interrupt and LPMx.5 wake capability; alternate functions: TA3.1 capture/compare or CAP2.1 CapTIvate input/output |+| 23 | P4.1 | bidirectional | GPIO P4.1 with port interrupt and LPMx.5 wake capability; alternate functions: TA3.0 capture/compare or CAP2.2 CapTIvate input/output |+| 24 | P4.2 | bidirectional | GPIO P4.2 with port interrupt and LPMx.5 wake capability; alternate functions: TA3CLK input or CAP2.3 CapTIvate input/output |+| 25 | P2.7 | bidirectional | GPIO P2.7 with port interrupt and LPMx.5 wake capability; alternate functions: UCB1STE or CAP3.0 CapTIvate input/output |+| 26 | P3.5 | bidirectional | GPIO P3.5 with port interrupt and LPMx.5 wake capability; alternate functions: UCB1CLK, TB0TRG trigger input, or CAP3.1 CapTIvate input/output |+| 27 | P3.2 | bidirectional | GPIO P3.2 with port interrupt and LPMx.5 wake capability; alternate functions: UCB1SIMO/SDA or CAP3.2 CapTIvate input/output |+| 28 | P3.6 | bidirectional | GPIO P3.6 with port interrupt and LPMx.5 wake capability; alternate functions: UCB1SOMI/SCL or CAP3.3 CapTIvate input/output |+| 29 | P2.0 | bidirectional | GPIO P2.0 with port interrupt and LPMx.5 wake capability; alternate function: XOUT crystal oscillator output |+| 30 | P2.1 | bidirectional | GPIO P2.1 with port interrupt and LPMx.5 wake capability; alternate function: XIN crystal oscillator input |+| 31 | DVSS | power_in | Power ground reference for digital and analog modules |+| 32 | DVCC | power_in | Power supply 1.8 V to 3.6 V for digital and analog modules (FRAM in VREG mode) or 2.7 V to 3.6 V (DVCC electrode charge mode), bypass with 4.7 µF to 10 µF plus 100 nF capacitors |+| 33 | PAD | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HVQFN-32-EP(5x5) |+| Category | Embedded Processors & Controllers |+| Pins | 33 |++## CAD (KiCad official)++- Symbol: `MSP430FR2673TRHBR`+- Footprint: `Package_DFN_QFN:HVQFN-32-1EP_5x5mm_P0.5mm_EP3.1x3.1mm`+- 3D model: HVQFN-32-EP(5x5) (KiCad packages3D, STEP)+- 3D model files: `msp430fr2673trhbr-etched.step` / `msp430fr2673trhbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `msp430fr2673trhbr.step` / `msp430fr2673trhbr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/msp430fr2676) (123 pp, sha256 `7b85e943f4b7c4ad`, retrieved 2026-10-01, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/msp430fr2673trhbr-datasheet.pdf)
page.jsonadded+307@@ -0,0 +1,307 @@+{+ "slug": "msp430fr2673trhbr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), HVQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "msp430fr2673trhbr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "msp430fr2673trhbr.kicad_sym",+ "msp430fr2673trhbr.kicad_mod",+ "msp430fr2673trhbr.glb",+ "msp430fr2673trhbr.step",+ "msp430fr2673trhbr.lbr",+ "docs/hero.png",+ "docs/msp430fr2673trhbr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "MSP430FR2673TRHBR",+ "manufacturer": "Texas Instruments",+ "package": "HVQFN-32-EP(5x5)",+ "pin_count": 33,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/msp430fr2676",+ "parts": {+ "symbol": "msp430fr2673trhbr.kicad_sym",+ "footprint": "msp430fr2673trhbr.kicad_mod",+ "model_3d": "msp430fr2673trhbr-etched.glb",+ "model_3d_plain": "msp430fr2673trhbr.glb",+ "model_3d_step": "msp430fr2673trhbr-etched.step",+ "model_3d_step_plain": "msp430fr2673trhbr.step",+ "lbr": "msp430fr2673trhbr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2974716",+ "digikey": "296-MSP430FR2673TRHBRTR-ND",+ "mouser": "595-SP430FR2673TRHBR"+ },+ "distributor_check": {+ "checked_at": "2026-10-01T18:10:03Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-MSP430FR2673TRHBRTR-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-SP430FR2673TRHBR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "RST/NMI/SBWTDIO",+ "type": "input",+ "description": "Active-low reset input (RST), nonmaskable interrupt input (NMI), or Spy-Bi-Wire data input/output (SBWTDIO)"+ },+ {+ "number": "2",+ "name": "TEST/SBWTCK",+ "type": "input",+ "description": "Test mode pin (TEST) for JTAG or Spy-Bi-Wire clock input (SBWTCK)"+ },+ {+ "number": "3",+ "name": "P1.4",+ "type": "bidirectional",+ "description": "GPIO P1.4 with port interrupt and LPMx.5 wake capability; alternate functions: UCA0TXD/SIMO, TA1.2, TCK, A4 ADC, or VREF+ output"+ },+ {+ "number": "4",+ "name": "P1.5",+ "type": "bidirectional",+ "description": "GPIO P1.5 with port interrupt and LPMx.5 wake capability; alternate functions: UCA0RXD/SOMI, TA1.1, TMS, or A5 ADC"+ },+ {+ "number": "5",+ "name": "P1.6",+ "type": "bidirectional",+ "description": "GPIO P1.6 with port interrupt and LPMx.5 wake capability; alternate functions: UCA0CLK, TA1CLK, TDI, TCLK, or A6 ADC"+ },+ {+ "number": "6",+ "name": "P1.7",+ "type": "bidirectional",+ "description": "GPIO P1.7 with port interrupt and LPMx.5 wake capability; alternate functions: UCA0STE, SMCLK output, TDO, or A7 ADC"+ },+ {+ "number": "7",+ "name": "P1.0",+ "type": "bidirectional",+ "description": "GPIO P1.0 with port interrupt and LPMx.5 wake capability; alternate functions: UCB0STE, TA0CLK, A0 ADC, or Veref+ reference input"+ },+ {+ "number": "8",+ "name": "P1.1",+ "type": "bidirectional",+ "description": "GPIO P1.1 with port interrupt and LPMx.5 wake capability; alternate functions: UCB0CLK, TA0.1 capture/compare, COMP0.0, or A1 ADC"+ },+ {+ "number": "9",+ "name": "P1.2",+ "type": "bidirectional",+ "description": "GPIO P1.2 with port interrupt and LPMx.5 wake capability; alternate functions: UCB0SIMO/SDA, TA0.2, A2 ADC, or Veref- reference input"+ },+ {+ "number": "10",+ "name": "P1.3",+ "type": "bidirectional",+ "description": "GPIO P1.3 with port interrupt and LPMx.5 wake capability; alternate functions: UCB0SOMI/SCL, MCLK output, or A3 ADC"+ },+ {+ "number": "11",+ "name": "P2.2",+ "type": "bidirectional",+ "description": "GPIO P2.2 with port interrupt and LPMx.5 wake capability; alternate functions: SYNC input, ACLK output, or COMP0.1 input"+ },+ {+ "number": "12",+ "name": "P3.0",+ "type": "bidirectional",+ "description": "GPIO P3.0 with port interrupt and LPMx.5 wake capability; alternate functions: TA2.2 capture/compare or CAP0.0 CapTIvate input/output"+ },+ {+ "number": "13",+ "name": "P3.3",+ "type": "bidirectional",+ "description": "GPIO P3.3 with port interrupt and LPMx.5 wake capability; alternate functions: TA2.1 capture/compare or CAP0.1 CapTIvate input/output"+ },+ {+ "number": "14",+ "name": "P2.3",+ "type": "bidirectional",+ "description": "GPIO P2.3 with port interrupt and LPMx.5 wake capability; alternate functions: TA2.0 capture/compare or CAP0.2 CapTIvate input/output"+ },+ {+ "number": "15",+ "name": "P3.4",+ "type": "bidirectional",+ "description": "GPIO P3.4 with port interrupt and LPMx.5 wake capability; alternate functions: TA2CLK input, COMP0OUT output, or CAP0.3 CapTIvate input/output"+ },+ {+ "number": "16",+ "name": "P3.1",+ "type": "bidirectional",+ "description": "GPIO P3.1 with port interrupt and LPMx.5 wake capability; alternate functions: UCA1STE or CAP1.0 CapTIvate input/output"+ },+ {+ "number": "17",+ "name": "P2.4",+ "type": "bidirectional",+ "description": "GPIO P2.4 with port interrupt and LPMx.5 wake capability; alternate functions: UCA1CLK or CAP1.1 CapTIvate input/output"+ },+ {+ "number": "18",+ "name": "P2.5",+ "type": "bidirectional",+ "description": "GPIO P2.5 with port interrupt and LPMx.5 wake capability; alternate functions: UCA1RXD/SOMI or CAP1.2 CapTIvate input/output"+ },+ {+ "number": "19",+ "name": "P2.6",+ "type": "bidirectional",+ "description": "GPIO P2.6 with port interrupt and LPMx.5 wake capability; alternate functions: UCA1TXD/SIMO or CAP1.3 CapTIvate input/output"+ },+ {+ "number": "20",+ "name": "VREG",+ "type": "power_out",+ "description": "CapTIvate regulator output for external 1 µF decoupling capacitor (ESR ≤ 200 mΩ) after 260 µs warm-up time"+ },+ {+ "number": "21",+ "name": "P3.7",+ "type": "bidirectional",+ "description": "GPIO P3.7 with port interrupt and LPMx.5 wake capability; alternate functions: TA3.2 capture/compare or CAP2.0 CapTIvate input/output"+ },+ {+ "number": "22",+ "name": "P4.0",+ "type": "bidirectional",+ "description": "GPIO P4.0 with port interrupt and LPMx.5 wake capability; alternate functions: TA3.1 capture/compare or CAP2.1 CapTIvate input/output"+ },+ {+ "number": "23",+ "name": "P4.1",+ "type": "bidirectional",+ "description": "GPIO P4.1 with port interrupt and LPMx.5 wake capability; alternate functions: TA3.0 capture/compare or CAP2.2 CapTIvate input/output"+ },+ {+ "number": "24",+ "name": "P4.2",+ "type": "bidirectional",+ "description": "GPIO P4.2 with port interrupt and LPMx.5 wake capability; alternate functions: TA3CLK input or CAP2.3 CapTIvate input/output"+ },+ {+ "number": "25",+ "name": "P2.7",+ "type": "bidirectional",+ "description": "GPIO P2.7 with port interrupt and LPMx.5 wake capability; alternate functions: UCB1STE or CAP3.0 CapTIvate input/output"+ },+ {+ "number": "26",+ "name": "P3.5",+ "type": "bidirectional",+ "description": "GPIO P3.5 with port interrupt and LPMx.5 wake capability; alternate functions: UCB1CLK, TB0TRG trigger input, or CAP3.1 CapTIvate input/output"+ },+ {+ "number": "27",+ "name": "P3.2",+ "type": "bidirectional",+ "description": "GPIO P3.2 with port interrupt and LPMx.5 wake capability; alternate functions: UCB1SIMO/SDA or CAP3.2 CapTIvate input/output"+ },+ {+ "number": "28",+ "name": "P3.6",+ "type": "bidirectional",+ "description": "GPIO P3.6 with port interrupt and LPMx.5 wake capability; alternate functions: UCB1SOMI/SCL or CAP3.3 CapTIvate input/output"+ },+ {+ "number": "29",+ "name": "P2.0",+ "type": "bidirectional",+ "description": "GPIO P2.0 with port interrupt and LPMx.5 wake capability; alternate function: XOUT crystal oscillator output"+ },+ {+ "number": "30",+ "name": "P2.1",+ "type": "bidirectional",+ "description": "GPIO P2.1 with port interrupt and LPMx.5 wake capability; alternate function: XIN crystal oscillator input"+ },+ {+ "number": "31",+ "name": "DVSS",+ "type": "power_in",+ "description": "Power ground reference for digital and analog modules"+ },+ {+ "number": "32",+ "name": "DVCC",+ "type": "power_in",+ "description": "Power supply 1.8 V to 3.6 V for digital and analog modules (FRAM in VREG mode) or 2.7 V to 3.6 V (DVCC electrode charge mode), bypass with 4.7 µF to 10 µF plus 100 nF capacitors"+ },+ {+ "number": "33",+ "name": "PAD",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: CapTIvate pins (CAP0.0-CAP3.3) are shared with GPIO and use VREG power supply; electrical compatibil; Pin 3 (P1.4) functions as GPIO, ADC input A4, JTAG TCK, and VREF+ output; application must ensure so; VREG output requires specific external capacitor specification (1 µF, ESR ≤ 200 mΩ) for CapTIvate re"+ ],+ "pages_sent": 123,+ "cost_usd": 1.2237,+ "at": "2026-10-01T18:09:44"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/msp430fr2676",+ "pages": 123,+ "sha256": "7b85e943f4b7c4ad",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 33,+ "described": 33,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}