component
MSP430FR2673TRHBR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), HVQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
page.json+7−4@@ -166,7 +166,7 @@ "number": "20", "name": "VREG", "type": "power_out",- "description": "CapTIvate regulator output for external 1 \u00b5F decoupling capacitor (ESR \u2264 200 m\u03a9) after 260 \u00b5s warm-up time"+ "description": "CapTIvate regulator output for external 1 µF decoupling capacitor (ESR ≤ 200 mΩ) after 260 µs warm-up time" }, { "number": "21",@@ -238,7 +238,7 @@ "number": "32", "name": "DVCC", "type": "power_in",- "description": "Power supply 1.8 V to 3.6 V for digital and analog modules (FRAM in VREG mode) or 2.7 V to 3.6 V (DVCC electrode charge mode), bypass with 4.7 \u00b5F to 10 \u00b5F plus 100 nF capacitors"+ "description": "Power supply 1.8 V to 3.6 V for digital and analog modules (FRAM in VREG mode) or 2.7 V to 3.6 V (DVCC electrode charge mode), bypass with 4.7 µF to 10 µF plus 100 nF capacitors" }, { "number": "33",@@ -258,7 +258,7 @@ "consensus": "agreed", "guards": "pin_guards 0.1: passed", "guard_notes": [- "extractor flagged: CapTIvate pins (CAP0.0-CAP3.3) are shared with GPIO and use VREG power supply; electrical compatibil; Pin 3 (P1.4) functions as GPIO, ADC input A4, JTAG TCK, and VREF+ output; application must ensure so; VREG output requires specific external capacitor specification (1 \u00b5F, ESR \u2264 200 m\u03a9) for CapTIvate re"+ "extractor flagged: CapTIvate pins (CAP0.0-CAP3.3) are shared with GPIO and use VREG power supply; electrical compatibil; Pin 3 (P1.4) functions as GPIO, ADC input A4, JTAG TCK, and VREF+ output; application must ensure so; VREG output requires specific external capacitor specification (1 µF, ESR ≤ 200 mΩ) for CapTIvate re" ], "pages_sent": 123, "cost_usd": 1.2237,@@ -324,5 +324,8 @@ "docs/msp430fr2673trhbr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }