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MSP430FR2433IRGET
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Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+62@@ -0,0 +1,62 @@+# MSP430FR2433IRGET++**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · VQFN-24(4x4)++MSP430FR2433IRGET from Texas Instruments, in a VQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | RST/NMI/SBWTDIO | input | Reset input (RD); also functions as non-maskable interrupt input or Spy-Bi-Wire test data I/O pin. |+| 2 | TEST/SBWTCK | input | Test input (RD); also functions as Spy-Bi-Wire test clock input. |+| 3 | P1.4/UCA0TXD/UCA0SIMO/TA1.2/TCK/A4/VREF+ | bidirectional | Port 1.4 programmable I/O (RD) with alternate functions for eUSCI_A0 UART transmit, SPI master I/O, Timer_A1 capture/compare 2, JTAG clock, ADC channel 4 input, and reference voltage output. |+| 4 | P1.5/UCA0RXD/UCA0SOMI/TA1.1/TMS/A5 | bidirectional | Port 1.5 programmable I/O (RD) with alternate functions for eUSCI_A0 UART receive, SPI slave I/O, Timer_A1 capture/compare 1, JTAG mode select, and ADC channel 5. |+| 5 | P1.6/UCA0CLK/TA1CLK/TDI/TCLK/A6 | bidirectional | Port 1.6 programmable I/O (RD) with alternate functions for eUSCI_A0 SPI clock, Timer_A1 clock, JTAG data input, and ADC channel 6. |+| 6 | P1.7/UCA0STE/SMCLK/TDO/A7 | bidirectional | Port 1.7 programmable I/O (RD) with alternate functions for eUSCI_A0 SPI slave transmit enable, SMCLK output, JTAG data output, and ADC channel 7. |+| 7 | P1.0/UCB0STE/TA0CLK/A0/Veref+ | bidirectional | Port 1.0 programmable I/O (RD) with alternate functions for eUSCI_B0 SPI slave transmit enable, Timer_A0 clock, ADC channel 0 / positive reference input, and positive reference output. |+| 8 | P1.1/UCB0CLK/TA0.1/A1 | bidirectional | Port 1.1 programmable I/O (RD) with alternate functions for eUSCI_B0 SPI clock, Timer_A0 capture/compare 1, and ADC channel 1. |+| 9 | P1.2/UCB0SIMO/UCB0SDA/TA0.2/A2/Veref- | bidirectional | Port 1.2 programmable I/O (RD) with alternate functions for eUSCI_B0 SPI and I2C data, Timer_A0 capture/compare 2, ADC channel 2 / negative reference input, and negative reference output. |+| 10 | P1.3/UCB0SOMI/UCB0SCL/MCLK/A3 | bidirectional | Port 1.3 programmable I/O (RD) with alternate functions for eUSCI_B0 SPI and I2C clock, MCLK output, and ADC channel 3. |+| 11 | P2.2/ACLK | bidirectional | Port 2.2 programmable I/O (RD) with alternate function as auxiliary clock output. |+| 12 | P3.0 | bidirectional | Port 3.0 programmable I/O pin. |+| 13 | P2.3 | bidirectional | Port 2.3 programmable I/O pin. |+| 14 | P3.1/UCA1STE | bidirectional | Port 3.1 programmable I/O (RD) with alternate function as eUSCI_A1 slave transmit enable. |+| 15 | P2.4/UCA1CLK | bidirectional | Port 2.4 programmable I/O (RD) with alternate function as eUSCI_A1 clock. |+| 16 | P2.5/UCA1RXD/UCA1SOMI | bidirectional | Port 2.5 programmable I/O (RD) with alternate functions for eUSCI_A1 UART receive and SPI master output. |+| 17 | P2.6/UCA1TXD/UCA1SIMO | bidirectional | Port 2.6 programmable I/O (RD) with alternate functions for eUSCI_A1 UART transmit and SPI master input. |+| 18 | DVSS | power_in | Ground connection for analog and digital power supplies. |+| 19 | P2.7 | bidirectional | Port 2.7 programmable I/O pin. |+| 20 | P3.2 | bidirectional | Port 3.2 programmable I/O pin. |+| 21 | P2.0/XOUT | bidirectional | Port 2.0 programmable I/O (RD) or crystal oscillator output for 32 kHz external crystal. |+| 22 | P2.1/XIN | bidirectional | Port 2.1 programmable I/O (RD) or crystal oscillator input for 32 kHz external crystal. |+| 23 | DVSS | power_in | Ground connection for analog and digital power supplies. |+| 24 | DVCC | power_out | Positive power supply input (1.8 V to 3.6 V); 4.7 µF to 10 µF decoupling capacitor required as per Section 5.3. |+| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-24(4x4) |+| Category | Embedded Processors & Controllers |+| Pins | 25 |++## CAD (KiCad official)++- Symbol: `MSP430FR2433IRGET`+- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm`+- 3D model: VQFN-24(4x4) (KiCad packages3D, STEP)+- 3D model files: `msp430fr2433irget-etched.step` / `msp430fr2433irget-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `msp430fr2433irget.step` / `msp430fr2433irget.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/msp430fr2433) (92 pp, sha256 `92929a1a0a328b34`, retrieved 2026-10-05, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/msp430fr2433irget-datasheet.pdf)
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also functions as non-maskable interrupt input or Spy-Bi-Wire test data I/O pin."+ },+ {+ "number": "2",+ "name": "TEST/SBWTCK",+ "type": "input",+ "description": "Test input (RD); also functions as Spy-Bi-Wire test clock input."+ },+ {+ "number": "3",+ "name": "P1.4/UCA0TXD/UCA0SIMO/TA1.2/TCK/A4/VREF+",+ "type": "bidirectional",+ "description": "Port 1.4 programmable I/O (RD) with alternate functions for eUSCI_A0 UART transmit, SPI master I/O, Timer_A1 capture/compare 2, JTAG clock, ADC channel 4 input, and reference voltage output."+ },+ {+ "number": "4",+ "name": "P1.5/UCA0RXD/UCA0SOMI/TA1.1/TMS/A5",+ "type": "bidirectional",+ "description": "Port 1.5 programmable I/O (RD) with alternate functions for eUSCI_A0 UART receive, SPI slave I/O, Timer_A1 capture/compare 1, JTAG mode select, and ADC channel 5."+ },+ {+ "number": "5",+ "name": "P1.6/UCA0CLK/TA1CLK/TDI/TCLK/A6",+ "type": "bidirectional",+ "description": "Port 1.6 programmable I/O (RD) with alternate functions for eUSCI_A0 SPI clock, Timer_A1 clock, JTAG data input, and ADC channel 6."+ },+ {+ "number": "6",+ "name": "P1.7/UCA0STE/SMCLK/TDO/A7",+ "type": "bidirectional",+ "description": "Port 1.7 programmable I/O (RD) with alternate functions for eUSCI_A0 SPI slave transmit enable, SMCLK output, JTAG data output, and ADC channel 7."+ },+ {+ "number": "7",+ "name": "P1.0/UCB0STE/TA0CLK/A0/Veref+",+ "type": "bidirectional",+ "description": "Port 1.0 programmable I/O (RD) with alternate functions for eUSCI_B0 SPI slave transmit enable, Timer_A0 clock, ADC channel 0 / positive reference input, and positive reference output."+ },+ {+ "number": "8",+ "name": "P1.1/UCB0CLK/TA0.1/A1",+ "type": "bidirectional",+ "description": "Port 1.1 programmable I/O (RD) with alternate functions for eUSCI_B0 SPI clock, Timer_A0 capture/compare 1, and ADC channel 1."+ },+ {+ "number": "9",+ "name": "P1.2/UCB0SIMO/UCB0SDA/TA0.2/A2/Veref-",+ "type": "bidirectional",+ "description": "Port 1.2 programmable I/O (RD) with alternate functions for eUSCI_B0 SPI and I2C data, Timer_A0 capture/compare 2, ADC channel 2 / negative reference input, and negative reference output."+ },+ {+ "number": "10",+ "name": "P1.3/UCB0SOMI/UCB0SCL/MCLK/A3",+ "type": "bidirectional",+ "description": "Port 1.3 programmable I/O (RD) with alternate functions for eUSCI_B0 SPI and I2C clock, MCLK output, and ADC channel 3."+ },+ {+ "number": "11",+ "name": "P2.2/ACLK",+ "type": "bidirectional",+ "description": "Port 2.2 programmable I/O (RD) with alternate function as auxiliary clock output."+ },+ {+ "number": "12",+ "name": "P3.0",+ "type": "bidirectional",+ "description": "Port 3.0 programmable I/O pin."+ },+ {+ "number": "13",+ "name": "P2.3",+ "type": "bidirectional",+ "description": "Port 2.3 programmable I/O pin."+ },+ {+ "number": "14",+ "name": "P3.1/UCA1STE",+ "type": "bidirectional",+ "description": "Port 3.1 programmable I/O (RD) with alternate function as eUSCI_A1 slave transmit enable."+ },+ {+ "number": "15",+ "name": "P2.4/UCA1CLK",+ "type": "bidirectional",+ "description": "Port 2.4 programmable I/O (RD) with alternate function as eUSCI_A1 clock."+ },+ {+ "number": "16",+ "name": "P2.5/UCA1RXD/UCA1SOMI",+ "type": "bidirectional",+ "description": "Port 2.5 programmable I/O (RD) with alternate functions for eUSCI_A1 UART receive and SPI master output."+ },+ {+ "number": "17",+ "name": "P2.6/UCA1TXD/UCA1SIMO",+ "type": "bidirectional",+ "description": "Port 2.6 programmable I/O (RD) with alternate functions for eUSCI_A1 UART transmit and SPI master input."+ },+ {+ "number": "18",+ "name": "DVSS",+ "type": "power_in",+ "description": "Ground connection for analog and digital power supplies."+ },+ {+ "number": "19",+ "name": "P2.7",+ "type": "bidirectional",+ "description": "Port 2.7 programmable I/O pin."+ },+ {+ "number": "20",+ "name": "P3.2",+ "type": "bidirectional",+ "description": "Port 3.2 programmable I/O pin."+ },+ {+ "number": "21",+ "name": "P2.0/XOUT",+ "type": "bidirectional",+ "description": "Port 2.0 programmable I/O (RD) or crystal oscillator output for 32 kHz external crystal."+ },+ {+ "number": "22",+ "name": "P2.1/XIN",+ "type": "bidirectional",+ "description": "Port 2.1 programmable I/O (RD) or crystal oscillator input for 32 kHz external crystal."+ },+ {+ "number": "23",+ "name": "DVSS",+ "type": "power_in",+ "description": "Ground connection for analog and digital power supplies."+ },+ {+ "number": "24",+ "name": "DVCC",+ "type": "power_out",+ "description": "Positive power supply input (1.8 V to 3.6 V); 4.7 µF to 10 µF decoupling capacitor required as per Section 5.3."+ },+ {+ "number": "25",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "exposed pad 25 added from the footprint"+ ],+ "pages_sent": 40,+ "cost_usd": 0.3658,+ "at": "2026-10-05T20:24:17"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/msp430fr2433",+ "pages": 92,+ "sha256": "92929a1a0a328b34",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 25,+ "described": 25,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}