component
MSP430FG479IPNR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-80(12x12). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+116@@ -0,0 +1,116 @@+# MSP430FG479IPNR++**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · LQFP-80(12x12)++MSP430FG479IPNR from Texas Instruments, in a LQFP-80(12x12). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DVCC1 | power_in | Digital supply voltage, positive terminal; supplies all digital parts. |+| 2 | P2.2/TB1 | bidirectional | General-purpose digital I/O pin; Timer_B capture CCI1A/B input and compare Out1 output. |+| 3 | P2.1/TB0/S0 | bidirectional | General-purpose digital I/O pin; Timer_B capture CCI0A/B input, compare Out0 output, or LCD segment output S0. |+| 4 | P2.0/TA2/S1 | bidirectional | General-purpose digital I/O pin; Timer_A capture CCI2A/B input, compare Out2 output, or LCD segment output S1. |+| 5 | P2.6/CAOUT/S2 | bidirectional | General-purpose digital I/O pin; Comparator_A output or LCD segment output S2. |+| 6 | P2.7/S3 | bidirectional | General-purpose digital I/O pin or LCD segment output S3. |+| 7 | GND | power_in | Ground used to shield the oscillator; it is recommended to connect GND externally to DVSS. |+| 8 | XIN | input | Input port for crystal oscillator XT1; standard or watch crystals can be connected. |+| 9 | XOUT | output | Output port for crystal oscillator XT1; standard or watch crystals can be connected. |+| 10 | GND | power_in | Ground used to shield the oscillator; it is recommended to connect GND externally to DVSS. |+| 11 | P4.7/S4 | bidirectional | General-purpose digital I/O pin or LCD segment output S4. |+| 12 | P4.6/S5 | bidirectional | General-purpose digital I/O pin or LCD segment output S5. |+| 13 | P4.5/S6 | bidirectional | General-purpose digital I/O pin or LCD segment output S6. |+| 14 | P4.4/S7 | bidirectional | General-purpose digital I/O pin or LCD segment output S7. |+| 15 | P4.3/S8 | bidirectional | General-purpose digital I/O pin or LCD segment output S8. |+| 16 | P4.2/S9 | bidirectional | General-purpose digital I/O pin or LCD segment output S9. |+| 17 | P4.1/S10 | bidirectional | General-purpose digital I/O pin or LCD segment output S10. |+| 18 | P4.0/S11 | bidirectional | General-purpose digital I/O pin or LCD segment output S11. |+| 19 | S12 | output | LCD segment output S12. |+| 20 | S13 | output | LCD segment output S13. |+| 21 | S14 | output | LCD segment output S14. |+| 22 | S15 | output | LCD segment output S15. |+| 23 | S16 | output | LCD segment output S16. |+| 24 | S17 | output | LCD segment output S17. |+| 25 | S18 | output | LCD segment output S18. |+| 26 | S19 | output | LCD segment output S19. |+| 27 | P5.0/S20 | bidirectional | General-purpose digital I/O pin or LCD segment output S20. |+| 28 | P5.1/S21 | bidirectional | General-purpose digital I/O pin or LCD segment output S21. |+| 29 | S22 | output | LCD segment output S22. |+| 30 | S23 | output | LCD segment output S23. |+| 31 | S24 | output | LCD segment output S24. |+| 32 | S25 | output | LCD segment output S25. |+| 33 | COM0 | output | LCD common output COM0; COM0-3 are used for LCD backplanes. |+| 34 | P5.2/COM1 | bidirectional | General-purpose digital I/O pin or LCD common output COM1. |+| 35 | P5.3/COM2 | bidirectional | General-purpose digital I/O pin or LCD common output COM2. |+| 36 | P5.4/COM3 | bidirectional | General-purpose digital I/O pin or LCD common output COM3. |+| 37 | LCDCAP/R33 | bidirectional | Capacitor connection for the LCD charge pump and input port of the most positive analog LCD level (V4). |+| 38 | P5.5/R23 | bidirectional | General-purpose digital I/O pin or input port of the second most positive analog LCD level (V3). |+| 39 | P5.6/LCDREF/R13 | bidirectional | General-purpose digital I/O pin, external LCD reference voltage input, or input port of the third most positive analog LCD level (V3 or V2). |+| 40 | P5.7/R03 | bidirectional | General-purpose digital I/O pin or input port of the fourth most positive analog LCD level (V1). |+| 41 | P3.0/UCB0STE/UCA0CLK | bidirectional | General-purpose digital I/O pin; USCI_B0 slave transmit enable or USCI_A0 clock input/output. |+| 42 | P3.1/UCB0SIMO/UCB0SDA/S26 | bidirectional | General-purpose digital I/O pin; USCI_B0 slave in/master out in SPI mode, SDA I2C data in I2C mode, or LCD segment output S26. |+| 43 | P3.2/UCB0SOMI/UCB0SCL/S27 | bidirectional | General-purpose digital I/O pin; USCI_B0 slave out/master in in SPI mode, SCL I2C clock in I2C mode, or LCD segment output S27. |+| 44 | P3.3/UCB0CLK/UCA0STE | bidirectional | General-purpose digital I/O pin; USCI_B0 clock input/output or USCI_A0 slave transmit enable. |+| 45 | P3.4/S28 | bidirectional | General-purpose digital I/O pin or LCD segment output S28. |+| 46 | P3.5/S29 | bidirectional | General-purpose digital I/O pin or LCD segment output S29. |+| 47 | P3.6/S30 | bidirectional | General-purpose digital I/O pin or LCD segment output S30. |+| 48 | P3.7/S31 | bidirectional | General-purpose digital I/O pin or LCD segment output S31. |+| 49 | P1.7/CA1/A2+ | bidirectional | General-purpose digital I/O pin; Comparator_A input 1 or SD16 positive analog input A2. |+| 50 | P1.6/CA0/A2-/OA0I0/DAC0 | bidirectional | General-purpose digital I/O pin; Comparator_A input 0, SD16 negative analog input A2, OA0 analog input I0, or DAC12.0 output. |+| 51 | P1.5/TACLK/ACLK/A3+ | bidirectional | General-purpose digital I/O pin; Timer_A clock signal TACLK input, ACLK signal output, or SD16 positive analog input A3. |+| 52 | AVCC | power_in | Analog supply voltage, positive terminal. |+| 53 | AVSS | power_in | Analog supply voltage, negative terminal. |+| 54 | P1.4/TBCLK/SMCLK/A3-/OA1I0/DAC1 | bidirectional | General-purpose digital I/O pin; Timer_B clock input TBCLK, SMCLK signal output, SD16 negative analog input A3, OA1 analog input I0, or DAC12.1 output. |+| 55 | P1.3/TBOUTH/SVSOUT/A4+/OA1I3 | bidirectional | General-purpose digital I/O pin; TBOUTH PWM disable, SVS comparator output, SD16 positive analog input A4, or OA1 analog input I3. |+| 56 | P1.2/TA1/A4-/OA0I3 | bidirectional | General-purpose digital I/O pin; Timer_A capture CCI1A input, compare Out1 output, SD16 negative analog input A4, or OA0 analog input I3. |+| 57 | P1.1/TA0/MCLK/OA1RFB | bidirectional | General-purpose digital I/O pin; Timer_A capture CCI0B input, compare Out0 output, MCLK signal output, range switch to OA1 output, or BSL receive. |+| 58 | P1.0/TA0/OA0RFB | bidirectional | General-purpose digital I/O pin; Timer_A capture CCI0A input, compare Out0 output, range switch to OA0 output, or BSL transmit. |+| 59 | P6.7/OA1I2/SVSIN | bidirectional | General-purpose digital I/O pin; OA1 analog input I2 or SVS input. |+| 60 | VREF | power_in | Input for an external reference voltage or internal reference voltage output. |+| 61 | P6.6/OA1I1 | bidirectional | General-purpose digital I/O pin or OA1 analog input I1. |+| 62 | P6.5/OA0I2 | bidirectional | General-purpose digital I/O pin or OA0 analog input I2. |+| 63 | P6.4/A1-/OA1FB | bidirectional | General-purpose digital I/O pin; SD16 negative analog input A1 or OA1 analog feedback. |+| 64 | P6.3/A1+/OA1O | bidirectional | General-purpose digital I/O pin; SD16 positive analog input A1 or OA1 output. |+| 65 | P6.2/OA0I1 | bidirectional | General-purpose digital I/O pin or OA0 analog input I1. |+| 66 | P6.1/A0-/OA0FB | bidirectional | General-purpose digital I/O pin; SD16 negative analog input A0 or OA0 analog feedback. |+| 67 | P6.0/A0+/OA0O | bidirectional | General-purpose digital I/O pin; SD16 positive analog input A0 or OA0 output. |+| 68 | XT2OUT | output | Output terminal of crystal oscillator XT2. |+| 69 | XT2IN | input | Input port for crystal oscillator XT2. |+| 70 | TDO/TDI | bidirectional | Test data output port; TDO/TDI data output or programming data input terminal. |+| 71 | TDI/TCLK | input | Test data input or test clock input; the device protection fuse is connected to this pin. |+| 72 | TMS | input | Test mode select; used as an input port for device programming and test. |+| 73 | TCK | input | Test clock (JTAG) input for device programming, test, and bootloader start. |+| 74 | RST/NMI | input | Reset input, nonmaskable interrupt input port, or bootloader start (in flash devices). |+| 75 | P2.5/UCA0RXD/UCA0SOMI | bidirectional | General-purpose digital I/O pin; USCI_A0 receive data input in UART mode or slave data out/master in in SPI mode. |+| 76 | P2.4/UCA0TXD/UCA0SIMO | bidirectional | General-purpose digital I/O pin; USCI_A0 transmit data output in UART mode or slave data in/master out in SPI mode. |+| 77 | P2.3/TB2 | bidirectional | General-purpose digital I/O pin; Timer_B capture CCI2A/B input and compare Out2 output. |+| 78 | DVSS2 | power_in | Digital supply voltage, negative terminal; supplies all digital parts. |+| 79 | DVSS1 | power_in | Digital supply voltage, negative terminal; supplies all digital parts. |+| 80 | DVCC2 | power_in | Digital supply voltage, positive terminal; supplies all digital parts. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | LQFP-80(12x12) |+| Category | Embedded Processors & Controllers |+| Pins | 80 |++## CAD (KiCad official)++- Symbol: `MSP430FG479IPNR`+- Footprint: `Package_QFP:LQFP-80_12x12mm_P0.5mm`+- 3D model: LQFP-80(12x12) (KiCad packages3D, STEP)+- 3D model files: `msp430fg479ipnr-etched.step` / `msp430fg479ipnr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `msp430fg479ipnr.step` / `msp430fg479ipnr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/msp430fg479) (103 pp, sha256 `2029b4644174a9cd`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/msp430fg479ipnr-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "msp430fg479ipnr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "msp430fg479ipnr.kicad_sym",+ "msp430fg479ipnr.kicad_mod",+ "msp430fg479ipnr.glb",+ "msp430fg479ipnr.step",+ "msp430fg479ipnr.lbr",+ "docs/hero.png",+ "docs/msp430fg479ipnr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "msp430fg479ipnr-hero.glb",+ "msp430fg479ipnr-hero.overlay.json"+ ],+ "component": {+ "mpn": "MSP430FG479IPNR",+ "manufacturer": "Texas Instruments",+ "package": "LQFP-80(12x12)",+ "pin_count": 80,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/msp430fg479",+ "parts": {+ "symbol": "msp430fg479ipnr.kicad_sym",+ "footprint": "msp430fg479ipnr.kicad_mod",+ "model_3d": "msp430fg479ipnr-hero.glb",+ "model_3d_plain": "msp430fg479ipnr.glb",+ "model_3d_step": "msp430fg479ipnr-etched.step",+ "model_3d_step_plain": "msp430fg479ipnr.step",+ "lbr": "msp430fg479ipnr.lbr"+ },+ "distributor_links": {+ "lcsc": "C1339968",+ "digikey": "296-24305-2-ND",+ "mouser": "595-MSP430FG479IPNR"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T22:04:57Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-24305-2-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-MSP430FG479IPNR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "DVCC1",+ "type": "power_in",+ "description": "Digital supply voltage, positive terminal; supplies all digital parts."+ },+ {+ "number": "2",+ "name": "P2.2/TB1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; Timer_B capture CCI1A/B input and compare Out1 output."+ },+ {+ "number": "3",+ "name": "P2.1/TB0/S0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; Timer_B capture CCI0A/B input, compare Out0 output, or LCD segment output S0."+ },+ {+ "number": "4",+ "name": "P2.0/TA2/S1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; Timer_A capture CCI2A/B input, compare Out2 output, or LCD segment output S1."+ },+ {+ "number": "5",+ "name": "P2.6/CAOUT/S2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; Comparator_A output or LCD segment output S2."+ },+ {+ "number": "6",+ "name": "P2.7/S3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or LCD segment output S3."+ },+ {+ "number": "7",+ "name": "GND",+ "type": "power_in",+ "description": "Ground used to shield the oscillator; it is recommended to connect GND externally to DVSS."+ },+ {+ "number": "8",+ "name": "XIN",+ "type": "input",+ "description": "Input port for crystal oscillator XT1; standard or watch crystals can be connected."+ },+ {+ "number": "9",+ "name": "XOUT",+ "type": "output",+ "description": "Output port for crystal oscillator XT1; standard or watch crystals can be connected."+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Ground used to shield the oscillator; it is recommended to connect GND externally to DVSS."+ },+ {+ "number": "11",+ "name": "P4.7/S4",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or LCD segment output S4."+ },+ {+ "number": "12",+ "name": "P4.6/S5",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or LCD segment output S5."+ },+ {+ "number": "13",+ "name": "P4.5/S6",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or LCD segment output S6."+ },+ {+ "number": "14",+ "name": "P4.4/S7",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or LCD segment output S7."+ },+ {+ "number": "15",+ "name": "P4.3/S8",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or LCD segment output S8."+ },+ {+ "number": "16",+ "name": "P4.2/S9",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or LCD segment output S9."+ },+ {+ "number": "17",+ "name": "P4.1/S10",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or LCD segment output S10."+ },+ {+ "number": "18",+ "name": "P4.0/S11",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or LCD segment output S11."+ },+ {+ "number": "19",+ "name": "S12",+ "type": "output",+ "description": "LCD segment output S12."+ },+ {+ "number": "20",+ "name": "S13",+ "type": "output",+ "description": "LCD segment output S13."+ },+ {+ "number": "21",+ "name": "S14",+ "type": "output",+ "description": "LCD segment output S14."+ },+ {+ "number": "22",+ "name": "S15",+ "type": "output",+ "description": "LCD segment output S15."+ },+ {+ "number": "23",+ "name": "S16",+ "type": "output",+ "description": "LCD segment output S16."+ },+ {+ "number": "24",+ "name": "S17",+ "type": "output",+ "description": "LCD segment output S17."+ },+ {+ "number": "25",+ "name": "S18",+ "type": "output",+ "description": "LCD segment output S18."+ },+ {+ "number": "26",+ "name": "S19",+ "type": "output",+ "description": "LCD segment output S19."+ },+ {+ "number": "27",+ "name": "P5.0/S20",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or LCD segment output S20."+ },+ {+ "number": "28",+ "name": "P5.1/S21",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or LCD segment output S21."+ },+ {+ "number": "29",+ "name": "S22",+ "type": "output",+ "description": "LCD segment output S22."+ },+ {+ "number": "30",+ "name": "S23",+ "type": "output",+ "description": "LCD segment output S23."+ },+ {+ "number": "31",+ "name": "S24",+ "type": "output",+ "description": "LCD segment output S24."+ },+ {+ "number": "32",+ "name": "S25",+ "type": "output",+ "description": "LCD segment output S25."+ },+ {+ "number": "33",+ "name": "COM0",+ "type": "output",+ "description": "LCD common output COM0; COM0-3 are used for LCD backplanes."+ },+ {+ "number": "34",+ "name": "P5.2/COM1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or LCD common output COM1."+ },+ {+ "number": "35",+ "name": "P5.3/COM2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or LCD common output COM2."+ },+ {+ "number": "36",+ "name": "P5.4/COM3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or LCD common output COM3."+ },+ {+ "number": "37",+ "name": "LCDCAP/R33",+ "type": "bidirectional",+ "description": "Capacitor connection for the LCD charge pump and input port of the most positive analog LCD level (V4)."+ },+ {+ "number": "38",+ "name": "P5.5/R23",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or input port of the second most positive analog LCD level (V3)."+ },+ {+ "number": "39",+ "name": "P5.6/LCDREF/R13",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin, external LCD reference voltage input, or input port of the third most positive analog LCD level (V3 or V2)."+ },+ {+ "number": "40",+ "name": "P5.7/R03",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or input port of the fourth most positive analog LCD level (V1)."+ },+ {+ "number": "41",+ "name": "P3.0/UCB0STE/UCA0CLK",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; USCI_B0 slave transmit enable or USCI_A0 clock input/output."+ },+ {+ "number": "42",+ "name": "P3.1/UCB0SIMO/UCB0SDA/S26",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; USCI_B0 slave in/master out in SPI mode, SDA I2C data in I2C mode, or LCD segment output S26."+ },+ {+ "number": "43",+ "name": "P3.2/UCB0SOMI/UCB0SCL/S27",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; USCI_B0 slave out/master in in SPI mode, SCL I2C clock in I2C mode, or LCD segment output S27."+ },+ {+ "number": "44",+ "name": "P3.3/UCB0CLK/UCA0STE",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; USCI_B0 clock input/output or USCI_A0 slave transmit enable."+ },+ {+ "number": "45",+ "name": "P3.4/S28",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or LCD segment output S28."+ },+ {+ "number": "46",+ "name": "P3.5/S29",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or LCD segment output S29."+ },+ {+ "number": "47",+ "name": "P3.6/S30",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or LCD segment output S30."+ },+ {+ "number": "48",+ "name": "P3.7/S31",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or LCD segment output S31."+ },+ {+ "number": "49",+ "name": "P1.7/CA1/A2+",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; Comparator_A input 1 or SD16 positive analog input A2."+ },+ {+ "number": "50",+ "name": "P1.6/CA0/A2-/OA0I0/DAC0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; Comparator_A input 0, SD16 negative analog input A2, OA0 analog input I0, or DAC12.0 output."+ },+ {+ "number": "51",+ "name": "P1.5/TACLK/ACLK/A3+",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; Timer_A clock signal TACLK input, ACLK signal output, or SD16 positive analog input A3."+ },+ {+ "number": "52",+ "name": "AVCC",+ "type": "power_in",+ "description": "Analog supply voltage, positive terminal."+ },+ {+ "number": "53",+ "name": "AVSS",+ "type": "power_in",+ "description": "Analog supply voltage, negative terminal."+ },+ {+ "number": "54",+ "name": "P1.4/TBCLK/SMCLK/A3-/OA1I0/DAC1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; Timer_B clock input TBCLK, SMCLK signal output, SD16 negative analog input A3, OA1 analog input I0, or DAC12.1 output."+ },+ {+ "number": "55",+ "name": "P1.3/TBOUTH/SVSOUT/A4+/OA1I3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; TBOUTH PWM disable, SVS comparator output, SD16 positive analog input A4, or OA1 analog input I3."+ },+ {+ "number": "56",+ "name": "P1.2/TA1/A4-/OA0I3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; Timer_A capture CCI1A input, compare Out1 output, SD16 negative analog input A4, or OA0 analog input I3."+ },+ {+ "number": "57",+ "name": "P1.1/TA0/MCLK/OA1RFB",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; Timer_A capture CCI0B input, compare Out0 output, MCLK signal output, range switch to OA1 output, or BSL receive."+ },+ {+ "number": "58",+ "name": "P1.0/TA0/OA0RFB",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; Timer_A capture CCI0A input, compare Out0 output, range switch to OA0 output, or BSL transmit."+ },+ {+ "number": "59",+ "name": "P6.7/OA1I2/SVSIN",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; OA1 analog input I2 or SVS input."+ },+ {+ "number": "60",+ "name": "VREF",+ "type": "power_in",+ "description": "Input for an external reference voltage or internal reference voltage output."+ },+ {+ "number": "61",+ "name": "P6.6/OA1I1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or OA1 analog input I1."+ },+ {+ "number": "62",+ "name": "P6.5/OA0I2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or OA0 analog input I2."+ },+ {+ "number": "63",+ "name": "P6.4/A1-/OA1FB",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; SD16 negative analog input A1 or OA1 analog feedback."+ },+ {+ "number": "64",+ "name": "P6.3/A1+/OA1O",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; SD16 positive analog input A1 or OA1 output."+ },+ {+ "number": "65",+ "name": "P6.2/OA0I1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin or OA0 analog input I1."+ },+ {+ "number": "66",+ "name": "P6.1/A0-/OA0FB",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; SD16 negative analog input A0 or OA0 analog feedback."+ },+ {+ "number": "67",+ "name": "P6.0/A0+/OA0O",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; SD16 positive analog input A0 or OA0 output."+ },+ {+ "number": "68",+ "name": "XT2OUT",+ "type": "output",+ "description": "Output terminal of crystal oscillator XT2."+ },+ {+ "number": "69",+ "name": "XT2IN",+ "type": "input",+ "description": "Input port for crystal oscillator XT2."+ },+ {+ "number": "70",+ "name": "TDO/TDI",+ "type": "bidirectional",+ "description": "Test data output port; TDO/TDI data output or programming data input terminal."+ },+ {+ "number": "71",+ "name": "TDI/TCLK",+ "type": "input",+ "description": "Test data input or test clock input; the device protection fuse is connected to this pin."+ },+ {+ "number": "72",+ "name": "TMS",+ "type": "input",+ "description": "Test mode select; used as an input port for device programming and test."+ },+ {+ "number": "73",+ "name": "TCK",+ "type": "input",+ "description": "Test clock (JTAG) input for device programming, test, and bootloader start."+ },+ {+ "number": "74",+ "name": "RST/NMI",+ "type": "input",+ "description": "Reset input, nonmaskable interrupt input port, or bootloader start (in flash devices)."+ },+ {+ "number": "75",+ "name": "P2.5/UCA0RXD/UCA0SOMI",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; USCI_A0 receive data input in UART mode or slave data out/master in in SPI mode."+ },+ {+ "number": "76",+ "name": "P2.4/UCA0TXD/UCA0SIMO",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; USCI_A0 transmit data output in UART mode or slave data in/master out in SPI mode."+ },+ {+ "number": "77",+ "name": "P2.3/TB2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; Timer_B capture CCI2A/B input and compare Out2 output."+ },+ {+ "number": "78",+ "name": "DVSS2",+ "type": "power_in",+ "description": "Digital supply voltage, negative terminal; supplies all digital parts."+ },+ {+ "number": "79",+ "name": "DVSS1",+ "type": "power_in",+ "description": "Digital supply voltage, negative terminal; supplies all digital parts."+ },+ {+ "number": "80",+ "name": "DVCC2",+ "type": "power_in",+ "description": "Digital supply voltage, positive terminal; supplies all digital parts."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The 80-pin PN pin diagram (Figure 4-1) is an image with no text layer, so the pin-to-number mapping ; Table 4-1 gives I/O direction only as 'I/O', 'I', or 'O'. Mapped to KiCad types as bidirectional, in; Pins 7 and 10 are both listed as GND in the datasheet. The datasheet recommends connecting GND exter"+ ],+ "pages_sent": 52,+ "cost_usd": 0.2204,+ "at": "2026-10-07T22:04:28"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/msp430fg479",+ "pages": 103,+ "sha256": "2029b4644174a9cd",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 80,+ "described": 80,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "msp430fg479ipnr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 14,+ 14,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "f782bdbc6327d920be33e2b9906695d7c3690117933775c3f145eac71f2013ac",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "msp430fg479ipnr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 14,+ 14,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "13629c45ad996cbb7c96ce011379c12dd67acd50f0d74d16348846e881a25c40",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}