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MSP430F67751AIPZR
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Texas Instruments Microcontrollers (MCU/MPU/SOC), TQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+137@@ -0,0 +1,137 @@+# MSP430F67751AIPZR++**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · TQFP-100(14x14)++MSP430F67751AIPZR from Texas Instruments, in a TQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SD0P0 | input | SD24_B positive analog input for converter 0. |+| 2 | SD0N0 | input | SD24_B negative analog input for converter 0. |+| 3 | SD1P0 | input | SD24_B positive analog input for converter 1. |+| 4 | SD1N0 | input | SD24_B negative analog input for converter 1. |+| 5 | SD2P0 | input | SD24_B positive analog input for converter 2. |+| 6 | SD2N0 | input | SD24_B negative analog input for converter 2. |+| 7 | SD3P0 | input | SD24_B positive analog input for converter 3. |+| 8 | SD3N0 | input | SD24_B negative analog input for converter 3. |+| 9 | VASYS2 | power_in | Analog power supply selected between AVCC, AUXVCC1 and AUXVCC2; connect recommended capacitor CVSYS. |+| 10 | AVSS2 | power_in | Analog ground supply. |+| 11 | VREF | power_in | SD24_B external reference voltage input. |+| 12 | SD4P0 | input | SD24_B positive analog input for converter 4 (not available on F674x devices). |+| 13 | SD4N0 | input | SD24_B negative analog input for converter 4 (not available on F674x1A devices). |+| 14 | SD5P0 | input | SD24_B positive analog input for converter 5 (not available on F674x1A devices). |+| 15 | SD5N0 | input | SD24_B negative analog input for converter 5 (not available on F674x1A devices). |+| 16 | SD6P0 | input | SD24_B positive analog input for converter 6 (not available on F676x1A and F674x1A devices). |+| 17 | SD6N0 | input | SD24_B negative analog input for converter 6 (not available on F676x1A and F674x1A devices). |+| 18 | AVSS1 | power_in | Analog ground supply. |+| 19 | AVCC | power_in | Analog power supply; TI recommends powering AVCC and DVCC from the same source with at most 0.3 V difference. |+| 20 | VASYS1 | power_in | Analog power supply selected between AVCC, AUXVCC1 and AUXVCC2; connect recommended capacitor CVSYS. |+| 21 | AUXVCC2 | power_in | Auxiliary power supply AUXVCC2; load current limited to 20 mA for core and I/O and 5 mA for analog modules. |+| 22 | AUXVCC1 | power_in | Auxiliary power supply AUXVCC1; load current limited to 20 mA for core and I/O and 5 mA for analog modules. |+| 23 | VDSYS1 | power_in | Digital power supply selected between DVCC, AUXVCC1 and AUXVCC2; must be connected externally to VDSYS2 and to recommended capacitor CVSYS. |+| 24 | DVCC | power_in | Digital power supply; load current limited to 20 mA for core and I/O. |+| 25 | DVSS1 | power_in | Digital ground supply. |+| 26 | VCORE | power_out | Regulated core power supply for internal use only; no external DC loading, connect only to recommended CVCORE of 470 nF. |+| 27 | XIN | bidirectional | Input terminal for crystal oscillator. |+| 28 | XOUT | bidirectional | Output terminal for crystal oscillator. |+| 29 | AUXVCC3 | power_in | Auxiliary power supply AUXVCC3 for the backup subsystem (low-frequency oscillator, RTC and backup RAM). |+| 30 | RTCCAP1 | input | External time capture pin 1 for RTC_C. |+| 31 | RTCCAP0 | input | External time capture pin 0 for RTC_C. |+| 32 | P1.5/SMCLK/CB0/A5 | bidirectional | General-purpose digital I/O with port interrupt; SMCLK clock output, Comparator_B input CB0, and analog input A5 for 10-bit ADC. |+| 33 | P1.4/MCLK/CB1/A4 | bidirectional | General-purpose digital I/O with port interrupt; MCLK clock output, Comparator_B input CB1, and analog input A4 for 10-bit ADC. |+| 34 | P1.3/ADC10CLK/A3 | bidirectional | General-purpose digital I/O with port interrupt; ADC10_A clock output and analog input A3 for 10-bit ADC. |+| 35 | P1.2/ACLK/A2 | bidirectional | General-purpose digital I/O with port interrupt; ACLK clock output and analog input A2 for 10-bit ADC. |+| 36 | P1.1/TA2.1/CBOUT/VeREF+/A1 | bidirectional | General-purpose digital I/O with port interrupt; Timer TA2 CCR1 capture/compare output, Comparator_B output, positive ADC reference terminal for an externally applied reference, and analog input A1. |+| 37 | P1.0/TA1.1/VeREF-/A0 | bidirectional | General-purpose digital I/O with port interrupt; Timer TA1 CCR1 capture/compare output, negative ADC reference terminal for an externally applied reference, and analog input A0. |+| 38 | COM0 | bidirectional | LCD common output COM0 for LCD backplane. |+| 39 | COM1 | bidirectional | LCD common output COM1 for LCD backplane. |+| 40 | P1.6/COM2 | bidirectional | General-purpose digital I/O with port interrupt; LCD common output COM2. |+| 41 | P1.7/COM3 | bidirectional | General-purpose digital I/O with port interrupt; LCD common output COM3. |+| 42 | P2.0/PM_TA0.0/BSL_TX/COM4 | bidirectional | General-purpose digital I/O with port interrupt and mappable secondary function (default Timer TA0 CCR0 capture/compare); bootloader data transmit; LCD common output COM4. |+| 43 | P2.1/PM_TA0.1/BSL_RX/COM5 | bidirectional | General-purpose digital I/O with port interrupt and mappable secondary function (default Timer TA0 CCR1 capture/compare); bootloader data receive; LCD common output COM5. |+| 44 | P2.2/PM_TA0.2/COM6 | bidirectional | General-purpose digital I/O with port interrupt and mappable secondary function (default Timer TA0 CCR2 capture/compare); LCD common output COM6. |+| 45 | P2.3/PM_TA1.0/COM7 | bidirectional | General-purpose digital I/O with port interrupt and mappable secondary function (default Timer TA1 CCR0 capture/compare); LCD common output COM7. |+| 46 | LCDCAP/R33 | bidirectional | LCD capacitor connection and input/output port of most positive analog LCD voltage V1; must be connected to DVSS if not used. |+| 47 | P2.4/PM_TA2.0/R23 | bidirectional | General-purpose digital I/O with port interrupt and mappable secondary function (default Timer TA2 CCR0 capture/compare); input/output port of second most positive analog LCD voltage V2. |+| 48 | P2.5/PM_UCB0SOMI/PM_UCB0SCL/LCDREF/R13 | bidirectional | General-purpose digital I/O with port interrupt and mappable secondary function (default eUSCI_B0 SPI slave out/master in or I2C clock); external reference input for regulated LCD voltage; input/output port of third LCD voltage V3 or V4. |+| 49 | P2.6/PM_UCB0SIMO/PM_UCB0SDA/R03 | bidirectional | General-purpose digital I/O with port interrupt and mappable secondary function (default eUSCI_B0 SPI slave in/master out or I2C data); input/output port of lowest analog LCD voltage V5. |+| 50 | P2.7/PM_UCB0CLK/CB2 | bidirectional | General-purpose digital I/O with port interrupt and mappable secondary function (default eUSCI_B0 clock input/output); Comparator_B input CB2. |+| 51 | P3.0/PM_UCA0RXD/PM_UCA0SOMI | bidirectional | General-purpose digital I/O with mappable secondary function (default eUSCI_A0 UART receive data or SPI slave out/master in). |+| 52 | P3.1/PM_UCA0TXD/PM_UCA0SIMO/S39 | bidirectional | General-purpose digital I/O with mappable secondary function (default eUSCI_A0 UART transmit data or SPI slave in/master out); LCD segment output S39. |+| 53 | P3.2/PM_UCA0CLK/S38 | bidirectional | General-purpose digital I/O with mappable secondary function (default eUSCI_A0 clock input/output); LCD segment output S38. |+| 54 | P3.3/PM_UCA1CLK/S37 | bidirectional | General-purpose digital I/O with mappable secondary function (default eUSCI_A1 clock input/output); LCD segment output S37. |+| 55 | P3.4/PM_UCA1RXD/PM_UCA1SOMI/S36 | bidirectional | General-purpose digital I/O with mappable secondary function (default eUSCI_A1 UART receive data or SPI slave out/master in); LCD segment output S36. |+| 56 | P3.5/PM_UCA1TXD/PM_UCA1SIMO/S35 | bidirectional | General-purpose digital I/O with mappable secondary function (default eUSCI_A1 UART transmit data or SPI slave in/master out); LCD segment output S35. |+| 57 | P3.6/PM_UCA2RXD/PM_UCA2SOMI/S34 | bidirectional | General-purpose digital I/O with mappable secondary function (default eUSCI_A2 UART receive data or SPI slave out/master in); LCD segment output S34. |+| 58 | P3.7/PM_UCA2TXD/PM_UCA2SIMO/S33 | bidirectional | General-purpose digital I/O with mappable secondary function (default eUSCI_A2 UART transmit data or SPI slave in/master out); LCD segment output S33. |+| 59 | P4.0/PM_UCA2CLK/S32 | bidirectional | General-purpose digital I/O with mappable secondary function (default eUSCI_A2 clock input/output); LCD segment output S32. |+| 60 | P4.1/PM_UCA3RXD/PM_UCA3SOMI/S31 | bidirectional | General-purpose digital I/O with mappable secondary function (default eUSCI_A3 UART receive data or SPI slave out/master in); LCD segment output S31. |+| 61 | P4.2/PM_UCA3TXD/PM_UCA3SIMO/S30 | bidirectional | General-purpose digital I/O with mappable secondary function (default eUSCI_A3 UART transmit data or SPI slave in/master out); LCD segment output S30. |+| 62 | P4.3/PM_UCA3CLK/S29 | bidirectional | General-purpose digital I/O with mappable secondary function (default eUSCI_A3 clock input/output); LCD segment output S29. |+| 63 | P4.4/PM_UCB1SOMI/PM_UCB1SCL/S28 | bidirectional | General-purpose digital I/O with mappable secondary function (default eUSCI_B1 SPI slave out/master in or I2C clock); LCD segment output S28. |+| 64 | P4.5/PM_UCB1SIMO/PM_UCB1SDA/S27 | bidirectional | General-purpose digital I/O with mappable secondary function (default eUSCI_B1 SPI slave in/master out or I2C data); LCD segment output S27. |+| 65 | P4.6/PM_UCB1CLK/S26 | bidirectional | General-purpose digital I/O with mappable secondary function (default eUSCI_B1 clock input/output); LCD segment output S26. |+| 66 | P4.7/PM_TA3.0/S25 | bidirectional | General-purpose digital I/O with mappable secondary function (default Timer TA3 CCR0 capture/compare); LCD segment output S25. |+| 67 | P5.0/SDCLK/S24 | bidirectional | General-purpose digital I/O; SD24_B bit-stream clock input/output; LCD segment output S24. |+| 68 | P5.1/PM_SD0DIO/S23 | bidirectional | General-purpose digital I/O; default SD24_B converter 0 bit-stream data input/output; LCD segment output S23. |+| 69 | P5.2/PM_SD1DIO/S22 | bidirectional | General-purpose digital I/O; default SD24_B converter 1 bit-stream data input/output; LCD segment output S22. |+| 70 | P5.3/PM_SD2DIO/S21 | bidirectional | General-purpose digital I/O; default SD24_B converter 2 bit-stream data input/output; LCD segment output S21. |+| 71 | P5.4/PM_SD3DIO/S20 | bidirectional | General-purpose digital I/O; default SD24_B converter 3 bit-stream data input/output; LCD segment output S20. |+| 72 | P5.5/PM_SD4DIO/S19 | bidirectional | General-purpose digital I/O; default SD24_B converter 4 bit-stream data input/output; LCD segment output S19. |+| 73 | P5.6/PM_SD5DIO/S18 | bidirectional | General-purpose digital I/O; default SD24_B converter 5 bit-stream data input/output; LCD segment output S18. |+| 74 | P5.7/PM_SD6DIO/S17 | bidirectional | General-purpose digital I/O; default SD24_B converter 6 bit-stream data input/output; LCD segment output S17. |+| 75 | VDSYS2 | power_in | Digital power supply for I/Os; must be connected externally to VDSYS1. |+| 76 | DVSS2 | power_in | Digital ground supply. |+| 77 | P6.0/S16 | bidirectional | General-purpose digital I/O; LCD segment output S16. |+| 78 | P6.1/S15 | bidirectional | General-purpose digital I/O; LCD segment output S15. |+| 79 | P6.2/S14 | bidirectional | General-purpose digital I/O; LCD segment output S14. |+| 80 | P6.3/S13 | bidirectional | General-purpose digital I/O; LCD segment output S13. |+| 81 | P6.4/S12 | bidirectional | General-purpose digital I/O; LCD segment output S12. |+| 82 | P6.5/S11 | bidirectional | General-purpose digital I/O; LCD segment output S11. |+| 83 | P6.6/S10 | bidirectional | General-purpose digital I/O; LCD segment output S10. |+| 84 | P6.7/S9 | bidirectional | General-purpose digital I/O; LCD segment output S9. |+| 85 | P7.0/S8 | bidirectional | General-purpose digital I/O; LCD segment output S8. |+| 86 | P7.1/S7 | bidirectional | General-purpose digital I/O; LCD segment output S7. |+| 87 | P7.2/S6 | bidirectional | General-purpose digital I/O; LCD segment output S6. |+| 88 | P7.3/S5 | bidirectional | General-purpose digital I/O; LCD segment output S5. |+| 89 | P7.4/S4 | bidirectional | General-purpose digital I/O; LCD segment output S4. |+| 90 | P7.5/S3 | bidirectional | General-purpose digital I/O; LCD segment output S3. |+| 91 | P7.6/S2 | bidirectional | General-purpose digital I/O; LCD segment output S2. |+| 92 | P7.7/S1 | bidirectional | General-purpose digital I/O; LCD segment output S1. |+| 93 | P8.0/S0 | bidirectional | General-purpose digital I/O; LCD segment output S0. |+| 94 | P8.1/TACLK/RTCCLK/CB3 | bidirectional | General-purpose digital I/O; Timer clock input TACLK for TA0 to TA3, RTCCLK clock output, and Comparator_B input CB3. |+| 95 | TEST/SBWTCK | input | Test mode pin for selecting digital I/O on JTAG pins; Spy-Bi-Wire input clock; always has an internal pulldown enabled. |+| 96 | PJ.0/TDO | bidirectional | General-purpose digital I/O; JTAG test data output TDO. |+| 97 | PJ.1/TDI/TCLK | bidirectional | General-purpose digital I/O; JTAG test data input TDI or test clock input TCLK. |+| 98 | PJ.2/TMS | bidirectional | General-purpose digital I/O; JTAG test mode select TMS. |+| 99 | PJ.3/TCK | bidirectional | General-purpose digital I/O; JTAG test clock TCK. |+| 100 | RST/NMI/SBWTDIO | bidirectional | Reset input, active low (internal pullup enabled by default when configured as reset); nonmaskable interrupt input; Spy-By-Wire data input/output. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TQFP-100(14x14) |+| Category | Embedded Processors & Controllers |+| Pins | 100 |++## CAD (KiCad official)++- Symbol: `MSP430F67751AIPZR`+- Footprint: `Package_QFP:TQFP-100_14x14mm_P0.5mm`+- 3D model: TQFP-100(14x14) (KiCad packages3D, STEP)+- 3D model files: `msp430f67751aipzr-etched.step` / `msp430f67751aipzr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `msp430f67751aipzr.step` / `msp430f67751aipzr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/msp430f67451a) (187 pp, sha256 `fab731e7ae1f3a44`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/msp430f67751aipzr-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "msp430f67751aipzr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "msp430f67751aipzr.kicad_sym",+ "msp430f67751aipzr.kicad_mod",+ "msp430f67751aipzr.glb",+ "msp430f67751aipzr.step",+ "msp430f67751aipzr.lbr",+ "docs/hero.png",+ "docs/msp430f67751aipzr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "msp430f67751aipzr-hero.glb",+ "msp430f67751aipzr-hero.overlay.json"+ ],+ "component": {+ "mpn": "MSP430F67751AIPZR",+ "manufacturer": "Texas Instruments",+ "package": "TQFP-100(14x14)",+ "pin_count": 100,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/msp430f67451a",+ "parts": {+ "symbol": "msp430f67751aipzr.kicad_sym",+ "footprint": "msp430f67751aipzr.kicad_mod",+ "model_3d": "msp430f67751aipzr-hero.glb",+ "model_3d_plain": "msp430f67751aipzr.glb",+ "model_3d_step": "msp430f67751aipzr-etched.step",+ "model_3d_step_plain": "msp430f67751aipzr.step",+ "lbr": "msp430f67751aipzr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2055683",+ "digikey": "296-MSP430F67751AIPZRTR-ND",+ "mouser": "595-P430F67751AIPZR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T14:58:47Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-MSP430F67751AIPZRTR-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-P430F67751AIPZR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "SD0P0",+ "type": "input",+ "description": "SD24_B positive analog input for converter 0."+ },+ {+ "number": "2",+ "name": "SD0N0",+ "type": "input",+ "description": "SD24_B negative analog input for converter 0."+ },+ {+ "number": "3",+ "name": "SD1P0",+ "type": "input",+ "description": "SD24_B positive analog input for converter 1."+ },+ {+ "number": "4",+ "name": "SD1N0",+ "type": "input",+ "description": "SD24_B negative analog input for converter 1."+ },+ {+ "number": "5",+ "name": "SD2P0",+ "type": "input",+ "description": "SD24_B positive analog input for converter 2."+ },+ {+ "number": "6",+ "name": "SD2N0",+ "type": "input",+ "description": "SD24_B negative analog input for converter 2."+ },+ {+ "number": "7",+ "name": "SD3P0",+ "type": "input",+ "description": "SD24_B positive analog input for converter 3."+ },+ {+ "number": "8",+ "name": "SD3N0",+ "type": "input",+ "description": "SD24_B negative analog input for converter 3."+ },+ {+ "number": "9",+ "name": "VASYS2",+ "type": "power_in",+ "description": "Analog power supply selected between AVCC, AUXVCC1 and AUXVCC2; connect recommended capacitor CVSYS."+ },+ {+ "number": "10",+ "name": "AVSS2",+ "type": "power_in",+ "description": "Analog ground supply."+ },+ {+ "number": "11",+ "name": "VREF",+ "type": "power_in",+ "description": "SD24_B external reference voltage input."+ },+ {+ "number": "12",+ "name": "SD4P0",+ "type": "input",+ "description": "SD24_B positive analog input for converter 4 (not available on F674x devices)."+ },+ {+ "number": "13",+ "name": "SD4N0",+ "type": "input",+ "description": "SD24_B negative analog input for converter 4 (not available on F674x1A devices)."+ },+ {+ "number": "14",+ "name": "SD5P0",+ "type": "input",+ "description": "SD24_B positive analog input for converter 5 (not available on F674x1A devices)."+ },+ {+ "number": "15",+ "name": "SD5N0",+ "type": "input",+ "description": "SD24_B negative analog input for converter 5 (not available on F674x1A devices)."+ },+ {+ "number": "16",+ "name": "SD6P0",+ "type": "input",+ "description": "SD24_B positive analog input for converter 6 (not available on F676x1A and F674x1A devices)."+ },+ {+ "number": "17",+ "name": "SD6N0",+ "type": "input",+ "description": "SD24_B negative analog input for converter 6 (not available on F676x1A and F674x1A devices)."+ },+ {+ "number": "18",+ "name": "AVSS1",+ "type": "power_in",+ "description": "Analog ground supply."+ },+ {+ "number": "19",+ "name": "AVCC",+ "type": "power_in",+ "description": "Analog power supply; TI recommends powering AVCC and DVCC from the same source with at most 0.3 V difference."+ },+ {+ "number": "20",+ "name": "VASYS1",+ "type": "power_in",+ "description": "Analog power supply selected between AVCC, AUXVCC1 and AUXVCC2; connect recommended capacitor CVSYS."+ },+ {+ "number": "21",+ "name": "AUXVCC2",+ "type": "power_in",+ "description": "Auxiliary power supply AUXVCC2; load current limited to 20 mA for core and I/O and 5 mA for analog modules."+ },+ {+ "number": "22",+ "name": "AUXVCC1",+ "type": "power_in",+ "description": "Auxiliary power supply AUXVCC1; load current limited to 20 mA for core and I/O and 5 mA for analog modules."+ },+ {+ "number": "23",+ "name": "VDSYS1",+ "type": "power_in",+ "description": "Digital power supply selected between DVCC, AUXVCC1 and AUXVCC2; must be connected externally to VDSYS2 and to recommended capacitor CVSYS."+ },+ {+ "number": "24",+ "name": "DVCC",+ "type": "power_in",+ "description": "Digital power supply; load current limited to 20 mA for core and I/O."+ },+ {+ "number": "25",+ "name": "DVSS1",+ "type": "power_in",+ "description": "Digital ground supply."+ },+ {+ "number": "26",+ "name": "VCORE",+ "type": "power_out",+ "description": "Regulated core power supply for internal use only; no external DC loading, connect only to recommended CVCORE of 470 nF."+ },+ {+ "number": "27",+ "name": "XIN",+ "type": "bidirectional",+ "description": "Input terminal for crystal oscillator."+ },+ {+ "number": "28",+ "name": "XOUT",+ "type": "bidirectional",+ "description": "Output terminal for crystal oscillator."+ },+ {+ "number": "29",+ "name": "AUXVCC3",+ "type": "power_in",+ "description": "Auxiliary power supply AUXVCC3 for the backup subsystem (low-frequency oscillator, RTC and backup RAM)."+ },+ {+ "number": "30",+ "name": "RTCCAP1",+ "type": "input",+ "description": "External time capture pin 1 for RTC_C."+ },+ {+ "number": "31",+ "name": "RTCCAP0",+ "type": "input",+ "description": "External time capture pin 0 for RTC_C."+ },+ {+ "number": "32",+ "name": "P1.5/SMCLK/CB0/A5",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; SMCLK clock output, Comparator_B input CB0, and analog input A5 for 10-bit ADC."+ },+ {+ "number": "33",+ "name": "P1.4/MCLK/CB1/A4",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; MCLK clock output, Comparator_B input CB1, and analog input A4 for 10-bit ADC."+ },+ {+ "number": "34",+ "name": "P1.3/ADC10CLK/A3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; ADC10_A clock output and analog input A3 for 10-bit ADC."+ },+ {+ "number": "35",+ "name": "P1.2/ACLK/A2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; ACLK clock output and analog input A2 for 10-bit ADC."+ },+ {+ "number": "36",+ "name": "P1.1/TA2.1/CBOUT/VeREF+/A1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; Timer TA2 CCR1 capture/compare output, Comparator_B output, positive ADC reference terminal for an externally applied reference, and analog input A1."+ },+ {+ "number": "37",+ "name": "P1.0/TA1.1/VeREF-/A0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; Timer TA1 CCR1 capture/compare output, negative ADC reference terminal for an externally applied reference, and analog input A0."+ },+ {+ "number": "38",+ "name": "COM0",+ "type": "bidirectional",+ "description": "LCD common output COM0 for LCD backplane."+ },+ {+ "number": "39",+ "name": "COM1",+ "type": "bidirectional",+ "description": "LCD common output COM1 for LCD backplane."+ },+ {+ "number": "40",+ "name": "P1.6/COM2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; LCD common output COM2."+ },+ {+ "number": "41",+ "name": "P1.7/COM3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; LCD common output COM3."+ },+ {+ "number": "42",+ "name": "P2.0/PM_TA0.0/BSL_TX/COM4",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and mappable secondary function (default Timer TA0 CCR0 capture/compare); bootloader data transmit; LCD common output COM4."+ },+ {+ "number": "43",+ "name": "P2.1/PM_TA0.1/BSL_RX/COM5",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and mappable secondary function (default Timer TA0 CCR1 capture/compare); bootloader data receive; LCD common output COM5."+ },+ {+ "number": "44",+ "name": "P2.2/PM_TA0.2/COM6",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and mappable secondary function (default Timer TA0 CCR2 capture/compare); LCD common output COM6."+ },+ {+ "number": "45",+ "name": "P2.3/PM_TA1.0/COM7",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and mappable secondary function (default Timer TA1 CCR0 capture/compare); LCD common output COM7."+ },+ {+ "number": "46",+ "name": "LCDCAP/R33",+ "type": "bidirectional",+ "description": "LCD capacitor connection and input/output port of most positive analog LCD voltage V1; must be connected to DVSS if not used."+ },+ {+ "number": "47",+ "name": "P2.4/PM_TA2.0/R23",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and mappable secondary function (default Timer TA2 CCR0 capture/compare); input/output port of second most positive analog LCD voltage V2."+ },+ {+ "number": "48",+ "name": "P2.5/PM_UCB0SOMI/PM_UCB0SCL/LCDREF/R13",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and mappable secondary function (default eUSCI_B0 SPI slave out/master in or I2C clock); external reference input for regulated LCD voltage; input/output port of third LCD voltage V3 or V4."+ },+ {+ "number": "49",+ "name": "P2.6/PM_UCB0SIMO/PM_UCB0SDA/R03",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and mappable secondary function (default eUSCI_B0 SPI slave in/master out or I2C data); input/output port of lowest analog LCD voltage V5."+ },+ {+ "number": "50",+ "name": "P2.7/PM_UCB0CLK/CB2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt and mappable secondary function (default eUSCI_B0 clock input/output); Comparator_B input CB2."+ },+ {+ "number": "51",+ "name": "P3.0/PM_UCA0RXD/PM_UCA0SOMI",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with mappable secondary function (default eUSCI_A0 UART receive data or SPI slave out/master in)."+ },+ {+ "number": "52",+ "name": "P3.1/PM_UCA0TXD/PM_UCA0SIMO/S39",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with mappable secondary function (default eUSCI_A0 UART transmit data or SPI slave in/master out); LCD segment output S39."+ },+ {+ "number": "53",+ "name": "P3.2/PM_UCA0CLK/S38",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with mappable secondary function (default eUSCI_A0 clock input/output); LCD segment output S38."+ },+ {+ "number": "54",+ "name": "P3.3/PM_UCA1CLK/S37",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with mappable secondary function (default eUSCI_A1 clock input/output); LCD segment output S37."+ },+ {+ "number": "55",+ "name": "P3.4/PM_UCA1RXD/PM_UCA1SOMI/S36",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with mappable secondary function (default eUSCI_A1 UART receive data or SPI slave out/master in); LCD segment output S36."+ },+ {+ "number": "56",+ "name": "P3.5/PM_UCA1TXD/PM_UCA1SIMO/S35",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with mappable secondary function (default eUSCI_A1 UART transmit data or SPI slave in/master out); LCD segment output S35."+ },+ {+ "number": "57",+ "name": "P3.6/PM_UCA2RXD/PM_UCA2SOMI/S34",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with mappable secondary function (default eUSCI_A2 UART receive data or SPI slave out/master in); LCD segment output S34."+ },+ {+ "number": "58",+ "name": "P3.7/PM_UCA2TXD/PM_UCA2SIMO/S33",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with mappable secondary function (default eUSCI_A2 UART transmit data or SPI slave in/master out); LCD segment output S33."+ },+ {+ "number": "59",+ "name": "P4.0/PM_UCA2CLK/S32",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with mappable secondary function (default eUSCI_A2 clock input/output); LCD segment output S32."+ },+ {+ "number": "60",+ "name": "P4.1/PM_UCA3RXD/PM_UCA3SOMI/S31",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with mappable secondary function (default eUSCI_A3 UART receive data or SPI slave out/master in); LCD segment output S31."+ },+ {+ "number": "61",+ "name": "P4.2/PM_UCA3TXD/PM_UCA3SIMO/S30",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with mappable secondary function (default eUSCI_A3 UART transmit data or SPI slave in/master out); LCD segment output S30."+ },+ {+ "number": "62",+ "name": "P4.3/PM_UCA3CLK/S29",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with mappable secondary function (default eUSCI_A3 clock input/output); LCD segment output S29."+ },+ {+ "number": "63",+ "name": "P4.4/PM_UCB1SOMI/PM_UCB1SCL/S28",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with mappable secondary function (default eUSCI_B1 SPI slave out/master in or I2C clock); LCD segment output S28."+ },+ {+ "number": "64",+ "name": "P4.5/PM_UCB1SIMO/PM_UCB1SDA/S27",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with mappable secondary function (default eUSCI_B1 SPI slave in/master out or I2C data); LCD segment output S27."+ },+ {+ "number": "65",+ "name": "P4.6/PM_UCB1CLK/S26",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with mappable secondary function (default eUSCI_B1 clock input/output); LCD segment output S26."+ },+ {+ "number": "66",+ "name": "P4.7/PM_TA3.0/S25",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with mappable secondary function (default Timer TA3 CCR0 capture/compare); LCD segment output S25."+ },+ {+ "number": "67",+ "name": "P5.0/SDCLK/S24",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; SD24_B bit-stream clock input/output; LCD segment output S24."+ },+ {+ "number": "68",+ "name": "P5.1/PM_SD0DIO/S23",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; default SD24_B converter 0 bit-stream data input/output; LCD segment output S23."+ },+ {+ "number": "69",+ "name": "P5.2/PM_SD1DIO/S22",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; default SD24_B converter 1 bit-stream data input/output; LCD segment output S22."+ },+ {+ "number": "70",+ "name": "P5.3/PM_SD2DIO/S21",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; default SD24_B converter 2 bit-stream data input/output; LCD segment output S21."+ },+ {+ "number": "71",+ "name": "P5.4/PM_SD3DIO/S20",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; default SD24_B converter 3 bit-stream data input/output; LCD segment output S20."+ },+ {+ "number": "72",+ "name": "P5.5/PM_SD4DIO/S19",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; default SD24_B converter 4 bit-stream data input/output; LCD segment output S19."+ },+ {+ "number": "73",+ "name": "P5.6/PM_SD5DIO/S18",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; default SD24_B converter 5 bit-stream data input/output; LCD segment output S18."+ },+ {+ "number": "74",+ "name": "P5.7/PM_SD6DIO/S17",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; default SD24_B converter 6 bit-stream data input/output; LCD segment output S17."+ },+ {+ "number": "75",+ "name": "VDSYS2",+ "type": "power_in",+ "description": "Digital power supply for I/Os; must be connected externally to VDSYS1."+ },+ {+ "number": "76",+ "name": "DVSS2",+ "type": "power_in",+ "description": "Digital ground supply."+ },+ {+ "number": "77",+ "name": "P6.0/S16",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; LCD segment output S16."+ },+ {+ "number": "78",+ "name": "P6.1/S15",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; LCD segment output S15."+ },+ {+ "number": "79",+ "name": "P6.2/S14",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; LCD segment output S14."+ },+ {+ "number": "80",+ "name": "P6.3/S13",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; LCD segment output S13."+ },+ {+ "number": "81",+ "name": "P6.4/S12",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; LCD segment output S12."+ },+ {+ "number": "82",+ "name": "P6.5/S11",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; LCD segment output S11."+ },+ {+ "number": "83",+ "name": "P6.6/S10",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; LCD segment output S10."+ },+ {+ "number": "84",+ "name": "P6.7/S9",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; LCD segment output S9."+ },+ {+ "number": "85",+ "name": "P7.0/S8",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; LCD segment output S8."+ },+ {+ "number": "86",+ "name": "P7.1/S7",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; LCD segment output S7."+ },+ {+ "number": "87",+ "name": "P7.2/S6",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; LCD segment output S6."+ },+ {+ "number": "88",+ "name": "P7.3/S5",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; LCD segment output S5."+ },+ {+ "number": "89",+ "name": "P7.4/S4",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; LCD segment output S4."+ },+ {+ "number": "90",+ "name": "P7.5/S3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; LCD segment output S3."+ },+ {+ "number": "91",+ "name": "P7.6/S2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; LCD segment output S2."+ },+ {+ "number": "92",+ "name": "P7.7/S1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; LCD segment output S1."+ },+ {+ "number": "93",+ "name": "P8.0/S0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; LCD segment output S0."+ },+ {+ "number": "94",+ "name": "P8.1/TACLK/RTCCLK/CB3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; Timer clock input TACLK for TA0 to TA3, RTCCLK clock output, and Comparator_B input CB3."+ },+ {+ "number": "95",+ "name": "TEST/SBWTCK",+ "type": "input",+ "description": "Test mode pin for selecting digital I/O on JTAG pins; Spy-Bi-Wire input clock; always has an internal pulldown enabled."+ },+ {+ "number": "96",+ "name": "PJ.0/TDO",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; JTAG test data output TDO."+ },+ {+ "number": "97",+ "name": "PJ.1/TDI/TCLK",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; JTAG test data input TDI or test clock input TCLK."+ },+ {+ "number": "98",+ "name": "PJ.2/TMS",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; JTAG test mode select TMS."+ },+ {+ "number": "99",+ "name": "PJ.3/TCK",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; JTAG test clock TCK."+ },+ {+ "number": "100",+ "name": "RST/NMI/SBWTDIO",+ "type": "bidirectional",+ "description": "Reset input, active low (internal pullup enabled by default when configured as reset); nonmaskable interrupt input; Spy-By-Wire data input/output."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Package naming: the datasheet calls this package LQFP (PZ), 100-pin, 14 mm x 14 mm, not TQFP. The Pa; Device variant: MSP430F67751A is an F677x1A part, so the F677x1A column of Table 4-2 applies. Pins 1; Pin types: the datasheet labels pins with I, O or I/O only. I/O was mapped to bidirectional, I to in"+ ],+ "pages_sent": 109,+ "cost_usd": 0.7631,+ "at": "2026-10-08T14:58:12"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/msp430f67451a",+ "pages": 187,+ "sha256": "fab731e7ae1f3a44",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 100,+ "described": 100,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "msp430f67751aipzr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 16,+ 16,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "99d530be126138ea024746562f1110203db0273456e99932e7e1930dc9f5fba5",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "msp430f67751aipzr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 16,+ 16,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "d9b9b4f83810a16d11efa7ec480033c50542b4176d18019b161e624271da40a3",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}