component
MSP430F4152IRGZR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+85@@ -0,0 +1,85 @@+# MSP430F4152IRGZR++**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · VQFN-48-EP(7x7)++MSP430F4152IRGZR from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | P6.1/UCB0SOMI/UCB0SCL | bidirectional | General-purpose digital I/O pin; its USCI_B0 SPI/I2C alternate function is listed as 64-pin-only and USCI_B0 cannot be used in the 48-pin package. |+| 2 | P6.2/UCB0SIMO/UCB0SDA | bidirectional | General-purpose digital I/O pin; its USCI_B0 SPI/I2C alternate function is listed as 64-pin-only and USCI_B0 cannot be used in the 48-pin package. |+| 3 | DVCC | power_in | Digital supply voltage, positive terminal; supplies all digital parts. |+| 4 | XIN | input | Input port for crystal oscillator XT1; standard or watch crystals can be connected. |+| 5 | XOUT | output | Output port for crystal oscillator XT1; standard or watch crystals can be connected. |+| 6 | DVSS | power_in | Digital supply voltage, negative terminal; supplies all digital parts. |+| 7 | P6.7/A7/CA7/SVSIN | bidirectional | General-purpose digital I/O pin; also ADC10 analog input A7, Comparator_A input CA7 and SVS input. |+| 8 | P4.7/ADC10CLK/S0 | bidirectional | General-purpose digital I/O pin; also ADC10 conversion clock output and LCD segment output S0. |+| 9 | P4.6/S1 | bidirectional | General-purpose digital I/O pin; also LCD segment output S1. |+| 10 | P4.5/S2 | bidirectional | General-purpose digital I/O pin; also LCD segment output S2. |+| 11 | P4.4/S3 | bidirectional | General-purpose digital I/O pin; also LCD segment output S3. |+| 12 | P4.3/S4 | bidirectional | General-purpose digital I/O pin; also LCD segment output S4. |+| 13 | P4.2/S5 | bidirectional | General-purpose digital I/O pin; also LCD segment output S5. |+| 14 | P4.1/S6 | bidirectional | General-purpose digital I/O pin; also LCD segment output S6. |+| 15 | P4.0/S7 | bidirectional | General-purpose digital I/O pin; also LCD segment output S7. |+| 16 | P2.7/S8 | bidirectional | General-purpose digital I/O pin; also LCD segment output S8. |+| 17 | P2.6/S9 | bidirectional | General-purpose digital I/O pin; also LCD segment output S9. |+| 18 | P2.5/S10 | bidirectional | General-purpose digital I/O pin; also LCD segment output S10. |+| 19 | P2.4/S11 | bidirectional | General-purpose digital I/O pin; also LCD segment output S11. |+| 20 | P2.3/TA1.4/S12 | bidirectional | General-purpose digital I/O pin; also Timer1_A5 compare Out4 output and LCD segment output S12. |+| 21 | P2.2/TA1.3/S13 | bidirectional | General-purpose digital I/O pin; also Timer1_A5 compare Out3 output and LCD segment output S13. |+| 22 | P2.1/TA1.2/S14 | bidirectional | General-purpose digital I/O pin; also Timer1_A5 compare Out2 output and LCD segment output S14. |+| 23 | P2.0/TA1.1/S15 | bidirectional | General-purpose digital I/O pin; also Timer1_A5 compare Out1 output and LCD segment output S15. |+| 24 | P3.4/CAOUT/S19 | bidirectional | General-purpose digital I/O pin; also Comparator_A output and LCD segment output S19. |+| 25 | P5.7/COM0 | bidirectional | General-purpose digital I/O pin; also LCD common output COM0 for LCD backplanes. |+| 26 | P5.6/COM1 | bidirectional | General-purpose digital I/O pin; also LCD common output COM1 for LCD backplanes. |+| 27 | P5.5/COM2 | bidirectional | General-purpose digital I/O pin; also LCD common output COM2 for LCD backplanes. |+| 28 | P5.4/COM3 | bidirectional | General-purpose digital I/O pin; also LCD common output COM3 for LCD backplanes. |+| 29 | P5.3/R03 | bidirectional | General-purpose digital I/O pin; also input port of the fourth most positive analog LCD level (V1). |+| 30 | P5.2/LCDREF/R13 | bidirectional | General-purpose digital I/O pin; also external LCD reference voltage input (LCDREF) and input port of the third most positive analog LCD level (V3 or V2). |+| 31 | P5.1/R23 | bidirectional | General-purpose digital I/O pin; also input port of the second most positive analog LCD level (V3). |+| 32 | LCDCAP/R33 | bidirectional | Capacitor connection for LCD charge pump; also input port of the most positive analog LCD level (V4). |+| 33 | P1.7/TA0CLK/CAOUT/CA1 | bidirectional | General-purpose digital I/O pin; also Timer0_A3 TACLK input, Comparator_A output and Comparator_A input CA1; TA0CLK is ORed with P1.5, so only one may be enabled at a time. |+| 34 | P1.6/ACLK/CA0 | bidirectional | General-purpose digital I/O pin; also ACLK signal output and Comparator_A input CA0. |+| 35 | P1.5/TA0CLK/CAOUT/S26 | bidirectional | General-purpose digital I/O pin; also Timer0_A3 TACLK input, Comparator_A output and LCD segment output S26. |+| 36 | P1.1/TA0.0/MCLK/S30 | bidirectional | General-purpose digital I/O pin; also Timer0_A3 CCI0B capture input, MCLK signal output and LCD segment output S30. |+| 37 | P1.0/TA0.0/S31 | bidirectional | General-purpose digital I/O pin; also Timer0_A3 CCI0A capture input, Out0 compare output and LCD segment output S31. |+| 38 | P7.0/TDO/TDI/S32 | bidirectional | General-purpose digital I/O pin; also JTAG test data output/input terminal for programming and test and LCD segment output S32. |+| 39 | P7.1/TDI/TCLK/S33 | bidirectional | General-purpose digital I/O pin; also JTAG test data input or test clock input for programming and test, and LCD segment output S33. |+| 40 | P7.2/TMS/S34 | bidirectional | General-purpose digital I/O pin; also JTAG test mode select input for device programming and test, and LCD segment output S34. |+| 41 | P7.3/TCK/S35 | bidirectional | General-purpose digital I/O pin; also test clock input for device programming and test, and LCD segment output S35. |+| 42 | RST/NMI/SBWTDIO | input | Reset or nonmaskable interrupt input; also Spy-Bi-Wire test data input/output during programming and test. |+| 43 | TEST/SBWTCLK | input | Selects test mode for JTAG pins on Port7; the device protection fuse is connected to TEST. |+| 44 | P7.4/TA1.4/A0/CA2 | bidirectional | General-purpose digital I/O pin; also Timer1_A5 capture CCI4B input, compare Out4 output, ADC10 analog input A0 and Comparator_A input CA2. |+| 45 | P7.5/TA1.3/A1/CA3 | bidirectional | General-purpose digital I/O pin; also Timer1_A5 capture CCI3B input, compare Out3 output, ADC10 analog input A1 and Comparator_A input CA3. |+| 46 | AVSS | power_in | Analog supply voltage, negative terminal. |+| 47 | P6.0/TA1.2/A2/CA4 | bidirectional | General-purpose digital I/O pin; also Timer1_A5 compare Out2 output, ADC10 analog input A2 (marked 64-pin-only in the datasheet) and Comparator_A input CA4. |+| 48 | AVCC | power_in | Analog supply voltage, positive terminal. |+| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-48-EP(7x7) |+| Category | Embedded Processors & Controllers |+| Pins | 49 |++## CAD (KiCad official)++- Symbol: `MSP430F4152IRGZR`+- Footprint: `Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm`+- 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)+- 3D model files: `msp430f4152irgzr-etched.step` / `msp430f4152irgzr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `msp430f4152irgzr.step` / `msp430f4152irgzr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/msp430f4152) (85 pp, sha256 `0b610cd707374514`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/msp430f4152irgzr-datasheet.pdf)
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its USCI_B0 SPI/I2C alternate function is listed as 64-pin-only and USCI_B0 cannot be used in the 48-pin package."+ },+ {+ "number": "2",+ "name": "P6.2/UCB0SIMO/UCB0SDA",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; its USCI_B0 SPI/I2C alternate function is listed as 64-pin-only and USCI_B0 cannot be used in the 48-pin package."+ },+ {+ "number": "3",+ "name": "DVCC",+ "type": "power_in",+ "description": "Digital supply voltage, positive terminal; supplies all digital parts."+ },+ {+ "number": "4",+ "name": "XIN",+ "type": "input",+ "description": "Input port for crystal oscillator XT1; standard or watch crystals can be connected."+ },+ {+ "number": "5",+ "name": "XOUT",+ "type": "output",+ "description": "Output port for crystal oscillator XT1; standard or watch crystals can be connected."+ },+ {+ "number": "6",+ "name": "DVSS",+ "type": "power_in",+ "description": "Digital supply voltage, negative terminal; supplies all digital parts."+ },+ {+ "number": "7",+ "name": "P6.7/A7/CA7/SVSIN",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also ADC10 analog input A7, Comparator_A input CA7 and SVS input."+ },+ {+ "number": "8",+ "name": "P4.7/ADC10CLK/S0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also ADC10 conversion clock output and LCD segment output S0."+ },+ {+ "number": "9",+ "name": "P4.6/S1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also LCD segment output S1."+ },+ {+ "number": "10",+ "name": "P4.5/S2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also LCD segment output S2."+ },+ {+ "number": "11",+ "name": "P4.4/S3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also LCD segment output S3."+ },+ {+ "number": "12",+ "name": "P4.3/S4",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also LCD segment output S4."+ },+ {+ "number": "13",+ "name": "P4.2/S5",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also LCD segment output S5."+ },+ {+ "number": "14",+ "name": "P4.1/S6",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also LCD segment output S6."+ },+ {+ "number": "15",+ "name": "P4.0/S7",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also LCD segment output S7."+ },+ {+ "number": "16",+ "name": "P2.7/S8",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also LCD segment output S8."+ },+ {+ "number": "17",+ "name": "P2.6/S9",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also LCD segment output S9."+ },+ {+ "number": "18",+ "name": "P2.5/S10",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also LCD segment output S10."+ },+ {+ "number": "19",+ "name": "P2.4/S11",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also LCD segment output S11."+ },+ {+ "number": "20",+ "name": "P2.3/TA1.4/S12",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also Timer1_A5 compare Out4 output and LCD segment output S12."+ },+ {+ "number": "21",+ "name": "P2.2/TA1.3/S13",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also Timer1_A5 compare Out3 output and LCD segment output S13."+ },+ {+ "number": "22",+ "name": "P2.1/TA1.2/S14",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also Timer1_A5 compare Out2 output and LCD segment output S14."+ },+ {+ "number": "23",+ "name": "P2.0/TA1.1/S15",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also Timer1_A5 compare Out1 output and LCD segment output S15."+ },+ {+ "number": "24",+ "name": "P3.4/CAOUT/S19",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also Comparator_A output and LCD segment output S19."+ },+ {+ "number": "25",+ "name": "P5.7/COM0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also LCD common output COM0 for LCD backplanes."+ },+ {+ "number": "26",+ "name": "P5.6/COM1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also LCD common output COM1 for LCD backplanes."+ },+ {+ "number": "27",+ "name": "P5.5/COM2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also LCD common output COM2 for LCD backplanes."+ },+ {+ "number": "28",+ "name": "P5.4/COM3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also LCD common output COM3 for LCD backplanes."+ },+ {+ "number": "29",+ "name": "P5.3/R03",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also input port of the fourth most positive analog LCD level (V1)."+ },+ {+ "number": "30",+ "name": "P5.2/LCDREF/R13",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also external LCD reference voltage input (LCDREF) and input port of the third most positive analog LCD level (V3 or V2)."+ },+ {+ "number": "31",+ "name": "P5.1/R23",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also input port of the second most positive analog LCD level (V3)."+ },+ {+ "number": "32",+ "name": "LCDCAP/R33",+ "type": "bidirectional",+ "description": "Capacitor connection for LCD charge pump; also input port of the most positive analog LCD level (V4)."+ },+ {+ "number": "33",+ "name": "P1.7/TA0CLK/CAOUT/CA1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also Timer0_A3 TACLK input, Comparator_A output and Comparator_A input CA1; TA0CLK is ORed with P1.5, so only one may be enabled at a time."+ },+ {+ "number": "34",+ "name": "P1.6/ACLK/CA0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also ACLK signal output and Comparator_A input CA0."+ },+ {+ "number": "35",+ "name": "P1.5/TA0CLK/CAOUT/S26",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also Timer0_A3 TACLK input, Comparator_A output and LCD segment output S26."+ },+ {+ "number": "36",+ "name": "P1.1/TA0.0/MCLK/S30",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also Timer0_A3 CCI0B capture input, MCLK signal output and LCD segment output S30."+ },+ {+ "number": "37",+ "name": "P1.0/TA0.0/S31",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also Timer0_A3 CCI0A capture input, Out0 compare output and LCD segment output S31."+ },+ {+ "number": "38",+ "name": "P7.0/TDO/TDI/S32",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also JTAG test data output/input terminal for programming and test and LCD segment output S32."+ },+ {+ "number": "39",+ "name": "P7.1/TDI/TCLK/S33",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also JTAG test data input or test clock input for programming and test, and LCD segment output S33."+ },+ {+ "number": "40",+ "name": "P7.2/TMS/S34",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also JTAG test mode select input for device programming and test, and LCD segment output S34."+ },+ {+ "number": "41",+ "name": "P7.3/TCK/S35",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also test clock input for device programming and test, and LCD segment output S35."+ },+ {+ "number": "42",+ "name": "RST/NMI/SBWTDIO",+ "type": "input",+ "description": "Reset or nonmaskable interrupt input; also Spy-Bi-Wire test data input/output during programming and test."+ },+ {+ "number": "43",+ "name": "TEST/SBWTCLK",+ "type": "input",+ "description": "Selects test mode for JTAG pins on Port7; the device protection fuse is connected to TEST."+ },+ {+ "number": "44",+ "name": "P7.4/TA1.4/A0/CA2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also Timer1_A5 capture CCI4B input, compare Out4 output, ADC10 analog input A0 and Comparator_A input CA2."+ },+ {+ "number": "45",+ "name": "P7.5/TA1.3/A1/CA3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also Timer1_A5 capture CCI3B input, compare Out3 output, ADC10 analog input A1 and Comparator_A input CA3."+ },+ {+ "number": "46",+ "name": "AVSS",+ "type": "power_in",+ "description": "Analog supply voltage, negative terminal."+ },+ {+ "number": "47",+ "name": "P6.0/TA1.2/A2/CA4",+ "type": "bidirectional",+ "description": "General-purpose digital I/O pin; also Timer1_A5 compare Out2 output, ADC10 analog input A2 (marked 64-pin-only in the datasheet) and Comparator_A input CA4."+ },+ {+ "number": "48",+ "name": "AVCC",+ "type": "power_in",+ "description": "Analog supply voltage, positive terminal."+ },+ {+ "number": "49",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The thermal pad (QFN exposed pad, the EP in VQFN-48-EP) is listed in the terminal table as 'Thermal ; Package dimensions (7x7 mm) from the package hint are not stated in the supplied text; the package d; The datasheet states USCI_A0 and USCI_B0 cannot be used in the 48-pin RGZ package. The USCI alternat",+ "exposed pad 49 added from the footprint"+ ],+ "pages_sent": 35,+ "cost_usd": 0.1748,+ "at": "2026-10-08T16:35:44"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/msp430f4152",+ "pages": 85,+ "sha256": "0b610cd707374514",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 49,+ "described": 49,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "msp430f4152irgzr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7,+ 7,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "msp430f4152irgzr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7,+ 7,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "62a93adf77f32a11cef2b4b44733dea4efc2ca7d9fb187425805aabf4844e562",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}