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MSP430F2330TRHAR
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Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-40-EP(6x6). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+85@@ -0,0 +1,85 @@+# MSP430F2330TRHAR++**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · VQFN-40-EP(6x6)++MSP430F2330TRHAR from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DVCC | power_in | Digital supply voltage, positive terminal. Supplies all digital parts. Operating range 1.8 V to 3.6 V; must be tied to AVCC (pin 40) in the application. |+| 2 | XIN/P2.6/CA6 | bidirectional | Input terminal of crystal oscillator (LFXT1) / general-purpose digital I/O pin (P2.6) / Comparator_A input CA6. Function selected by port and basic-clock module control registers. |+| 3 | XOUT/P2.7/CA7 | bidirectional | Output terminal of crystal oscillator (LFXT1) / general-purpose digital I/O pin (P2.7) / Comparator_A input CA7. |+| 4 | P1.0/TACLK | bidirectional | General-purpose digital I/O pin / Timer_A external clock signal TACLK input. Selected via P1SEL. |+| 5 | P1.1/TA0 | bidirectional | General-purpose digital I/O pin / Timer_A capture: CCI0A input, compare: Out0 output. |+| 6 | P1.2/TA1 | bidirectional | General-purpose digital I/O pin / Timer_A capture: CCI1A input, compare: Out1 output. |+| 7 | P1.3/TA2 | bidirectional | General-purpose digital I/O pin / Timer_A capture: CCI2A input, compare: Out2 output. |+| 8 | P1.4/SMCLK | bidirectional | General-purpose digital I/O pin / SMCLK sub-main system clock output. Selected via P1SEL. |+| 9 | P1.5/TA0 | bidirectional | General-purpose digital I/O pin / Timer_A compare: Out0 output. |+| 10 | P1.6/TA1 | bidirectional | General-purpose digital I/O pin / Timer_A compare: Out1 output. |+| 11 | P1.7/TA2 | bidirectional | General-purpose digital I/O pin / Timer_A compare: Out2 output. |+| 12 | P2.0/ACLK/CA2 | bidirectional | General-purpose digital I/O pin / ACLK auxiliary clock output / Comparator_A input CA2. |+| 13 | P2.1/TAINCLK/CA3 | bidirectional | General-purpose digital I/O pin / Timer_A INCLK clock input / Comparator_A input CA3. |+| 14 | P2.2/CAOUT/TA0/CA4 | bidirectional | General-purpose digital I/O pin / Comparator_A output CAOUT / Timer_A capture: CCI0B input / Comparator_A input CA4. |+| 15 | P2.3/CA0/TA1 | bidirectional | General-purpose digital I/O pin / Comparator_A input CA0 / Timer_A compare: Out1 output. |+| 16 | P2.4/CA1/TA2 | bidirectional | General-purpose digital I/O pin / Comparator_A input CA1 / Timer_A compare: Out2 output. |+| 17 | P2.5/ROSC/CA5 | bidirectional | General-purpose digital I/O pin / input for external resistor defining DCO nominal frequency (ROSC) / Comparator_A input CA5. |+| 18 | P3.0/UCB0STE/UCA0CLK | bidirectional | General-purpose digital I/O pin / USCI_B0 slave transmit enable (SPI) / USCI_A0 clock input/output. |+| 19 | P3.1/UCB0SIMO/UCB0SDA | bidirectional | General-purpose digital I/O pin / USCI_B0 slave-in/master-out in SPI mode / SDA I2C data in I2C mode. |+| 20 | P3.2/UCB0SOMI/UCB0SCL | bidirectional | General-purpose digital I/O pin / USCI_B0 slave-out/master-in in SPI mode / SCL I2C clock in I2C mode. |+| 21 | P3.3/UCB0CLK/UCA0STE | bidirectional | General-purpose digital I/O / USCI_B0 clock input/output / USCI_A0 slave transmit enable. |+| 22 | P3.4/UCA0TXD/UCA0SIMO | bidirectional | General-purpose digital I/O pin / USCI_A0 transmit data output in UART mode / slave-in-master-out in SPI mode. |+| 23 | P3.5/UCA0RXD/UCA0SOMI | bidirectional | General-purpose digital I/O pin / USCI_A0 receive data input in UART mode / slave-out-master-in in SPI mode. |+| 24 | P3.6 | bidirectional | General-purpose digital I/O pin. |+| 25 | P3.7 | bidirectional | General-purpose digital I/O pin. |+| 26 | P4.0/TB0 | bidirectional | General-purpose digital I/O pin / Timer_B capture: CCI0A input, compare: Out0 output. |+| 27 | P4.1/TB1 | bidirectional | General-purpose digital I/O pin / Timer_B capture: CCI1A input, compare: Out1 output. |+| 28 | P4.2/TB2 | bidirectional | General-purpose digital I/O pin / Timer_B capture: CCI2A input, compare: Out2 output. |+| 29 | P4.3/TB0 | bidirectional | General-purpose digital I/O pin / Timer_B capture: CCI0B input, compare: Out0 output. |+| 30 | P4.4/TB1 | bidirectional | General-purpose digital I/O pin / Timer_B capture: CCI1B input, compare: Out1 output. |+| 31 | P4.5/TB2 | bidirectional | General-purpose digital I/O pin / Timer_B compare: Out2 output. |+| 32 | P4.6/TBOUTH/ACLK | bidirectional | General-purpose digital I/O pin / switch all Timer_B3 PWM digital outputs (TB0..TB2) to high impedance (TBOUTH) / ACLK auxiliary clock output. |+| 33 | P4.7/TBCLK | bidirectional | General-purpose digital I/O pin / input clock TBCLK for Timer_B3. |+| 34 | TDO/TDI | bidirectional | JTAG test data output port (TDO); doubles as TDI programming data input in bootstrap-loader/programming mode. |+| 35 | TDI/TCLK | input | JTAG test data input or test clock input. The device protection (security) fuse is connected to TDI/TCLK. |+| 36 | TMS | input | JTAG test mode select. Used as an input port for device programming and test. |+| 37 | TCK | input | JTAG test clock input for device programming and test. |+| 38 | RST/NMI | input | Reset input (active-low), nonmaskable-interrupt input port. Function selected by WDTCTL.NMI bit; requires external pull-up/decoupling per MSP430 hardware guide. |+| 39 | DVSS/AVSS | power_in | Digital/analog supply voltage, negative terminal (combined DVSS and AVSS return). Datasheet labels this pin 'D/AVSS'. |+| 40 | AVCC | power_in | Analog supply voltage, positive terminal. Operating range 1.8 V to 3.6 V; must be tied to DVCC in the application and decoupled to AVSS. |+| 41 | PAD | power_in | Exposed thermal pad on bottom of QFN. Connection to DVSS/AVSS is recommended for best thermal and electrical performance. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-40-EP(6x6) |+| Category | Embedded Processors & Controllers |+| Pins | 41 |++## Ordering variants++Same part, different packaging or reel option.++- `MSP430F2330TRHARIRHA`+- `MSP430F2330TRHAR`+- `MSP430F2330TRHARIRHAR`+- `MSP430F2330TRHARIYFF`++## CAD (KiCad official)++- Symbol: `MSP430F2330TRHAR`+- Footprint: `Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm`+- 3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](http://www.ti.com/cn/lit/gpn/msp430f2350) (None pp, sha256 `f06cdf6c56fd70e4`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/msp430f2330trhar-datasheet.pdf)
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