component
MP3924GU-Z
Public Made by Adomby adom
Monolithic Power Systems Power Over Ethernet (PoE) Controllers, QFN-32(5x5). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+266−8@@ -1,13 +1,276 @@ {+ "schema_version": 1,+ "type": "component", "slug": "mp3924gu-z",+ "title": "MP3924GU-Z",+ "brief": "Monolithic Power Systems Power Over Ethernet (PoE) Controllers, QFN-32(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Monolithic Power Systems Power Over Ethernet (PoE) Controllers, QFN-32(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "power management (pmic)", "mp3924gu-z" ],+ "component": {+ "mpn": "MP3924GU-Z",+ "manufacturer": "Monolithic Power Systems",+ "package": "QFN-32(5x5)",+ "pin_count": 32,+ "category": "Power Management (PMIC)",+ "subcategory": "Power Over Ethernet (PoE) Controllers",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589838151171665920",+ "parts": {+ "symbol": "mp3924gu-z.kicad_sym",+ "footprint": "mp3924gu-z.kicad_mod",+ "model_3d": "mp3924gu-z.glb",+ "model_3d_step": "mp3924gu-z.step",+ "lbr": "mp3924gu-z.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "GATE1",+ "type": "output",+ "description": "MOSFET gate driver for port 1. Drives the external pass N-MOSFET for port 1. Float if not used."+ },+ {+ "number": "2",+ "name": "OUT1",+ "type": "input",+ "description": "Output voltage sense pin for port 1. Connect to the output interface return for detection, classification, voltage sensing, and current-limit foldback control. Float if not used."+ },+ {+ "number": "3",+ "name": "INT2",+ "type": "output",+ "description": "High-priority interrupt request pin. Open-drain output that pulls low when the selected high-priority interrupt source register is set and the interrupt is enabled. Tie to DGND if unused. Max sink 20mA (5mA recommended)."+ },+ {+ "number": "4",+ "name": "SGND1",+ "type": "input",+ "description": "Current-sense negative input for port 1 and port 2. Connect to the low-side terminal of the sense resistor with a Kelvin connection. Tie to DGND if unused."+ },+ {+ "number": "5",+ "name": "CLS5",+ "type": "input",+ "description": "Class 5 enable input. Internally pulled down to DGND via 50k\u03a9. Leave floating to disable Class 5 classification (802.3at-compliant); tie to VCC to enable Class 5 devices. Status latched at start-up/reset."+ },+ {+ "number": "6",+ "name": "AUTO",+ "type": "input",+ "description": "Automatic mode setting pin. Internally pulled up to VCC via 50k\u03a9. Float for automatic mode (default), tie to DGND for default shutdown mode. Status latched at start-up/reset."+ },+ {+ "number": "7",+ "name": "MID",+ "type": "input",+ "description": "Midspan mode setting pin. Internally pulled up to VCC via 50k\u03a9. Float for midspan mode (re-initiate detection every 2.8s), tie to DGND to disable midspan mode. Status latched at start-up/reset."+ },+ {+ "number": "8",+ "name": "INT1",+ "type": "output",+ "description": "Interrupt request pin for all interrupt source events. Open-drain output; pulls low when the interrupt register is set and interrupts are enabled. Tie to DGND if unused. Max sink 20mA (5mA recommended)."+ },+ {+ "number": "9",+ "name": "SCL",+ "type": "input",+ "description": "I2C clock input pin. Requires external pull-up (typically 4.7k\u03a9) to VCC. Tie to VCC if I2C interface is not used."+ },+ {+ "number": "10",+ "name": "SDAO",+ "type": "output",+ "description": "I2C serial data output pin (open-drain). Requires external pull-up (typically 4.7k\u03a9) to VCC. Connect SDAO to SDAI for non-isolated applications. Tie to DGND if I2C unused. Max sink 20mA."+ },+ {+ "number": "11",+ "name": "SDAI",+ "type": "input",+ "description": "I2C serial data input pin. Requires external pull-up (typically 4.7k\u03a9) to VCC. Connect SDAI to SDAO for non-isolated applications. Tie to DGND if I2C unused."+ },+ {+ "number": "12",+ "name": "EN",+ "type": "input",+ "description": "Enable input. Turns all internal circuits and four ports (except the VCC regulator) on/off. Tie EN to VCC to enable the device automatically. VHI \u2265 2.5V, VLI \u2264 0.4V."+ },+ {+ "number": "13",+ "name": "A0",+ "type": "input",+ "description": "I2C address setting pin (LSB). Tie to VCC or DGND to set the lower 4 address bits (address = 010 A3 A2 A1 A0). Latched at start-up/reset. Internally pulled up to VCC via 50k\u03a9."+ },+ {+ "number": "14",+ "name": "A1",+ "type": "input",+ "description": "I2C address setting pin. Tie to VCC or DGND to set the lower 4 address bits. Latched at start-up/reset. Internally pulled up to VCC via 50k\u03a9."+ },+ {+ "number": "15",+ "name": "A2",+ "type": "input",+ "description": "I2C address setting pin. Tie to VCC or DGND to set the lower 4 address bits. Latched at start-up/reset. Internally pulled up to VCC via 50k\u03a9."+ },+ {+ "number": "16",+ "name": "A3",+ "type": "input",+ "description": "I2C address setting pin (MSB of lower nibble). Tie to VCC or DGND to set the lower 4 address bits. Latched at start-up/reset. Internally pulled up to VCC via 50k\u03a9."+ },+ {+ "number": "17",+ "name": "DGND",+ "type": "power_in",+ "description": "Ground of the internal digital and analog circuit."+ },+ {+ "number": "18",+ "name": "SGND2",+ "type": "input",+ "description": "Current-sense negative input for port 3 and port 4. Connect to the low-side terminal of the sense resistor with a Kelvin connection. Tie to DGND if unused."+ },+ {+ "number": "19",+ "name": "PGND",+ "type": "power_in",+ "description": "Ground of the input power supply."+ },+ {+ "number": "20",+ "name": "VCC",+ "type": "power_out",+ "description": "3.3V internal regulator output for analog and digital circuit supply. Requires a minimum 1\u00b5F ceramic capacitor to DGND. Current limit \u224817mA."+ },+ {+ "number": "21",+ "name": "PMAX",+ "type": "input",+ "description": "Maximum loading power setting pin. Connect a resistor from PMAX to DGND to set the total power capability across all four output ports. PMAX setting latched at start-up/reset."+ },+ {+ "number": "22",+ "name": "VIN",+ "type": "power_in",+ "description": "Power supply input for both VCC regulator and output ports. Recommended operating range 44V to 57V (absolute max 80V). Bypass with at least 0.1\u00b5F/100V ceramic between VIN and PGND."+ },+ {+ "number": "23",+ "name": "SENSE4",+ "type": "input",+ "description": "Current-sense pin from the high-side sense resistor terminal for port 4. Recommended 0.25\u03a9 sense resistor with Kelvin connection. Tie to DGND if unused."+ },+ {+ "number": "24",+ "name": "GATE4",+ "type": "output",+ "description": "MOSFET gate driver for port 4. Drives the external pass N-MOSFET for port 4. Float if not used."+ },+ {+ "number": "25",+ "name": "OUT4",+ "type": "input",+ "description": "Output voltage sense pin for port 4. Connect to the output interface return for detection, classification, voltage sensing, and current-limit foldback control. Float if unused."+ },+ {+ "number": "26",+ "name": "SENSE3",+ "type": "input",+ "description": "Current-sense pin from the high-side sense resistor terminal for port 3. Recommended 0.25\u03a9 sense resistor with Kelvin connection. Tie to DGND if unused."+ },+ {+ "number": "27",+ "name": "GATE3",+ "type": "output",+ "description": "MOSFET gate driver for port 3. Drives the external pass N-MOSFET for port 3. Float if not used."+ },+ {+ "number": "28",+ "name": "OUT3",+ "type": "input",+ "description": "Output voltage sense pin for port 3. Connect to the output interface return for detection, classification, voltage sensing, and current-limit foldback control. Float if unused."+ },+ {+ "number": "29",+ "name": "SENSE2",+ "type": "input",+ "description": "Current-sense pin from the high-side sense resistor terminal for port 2. Recommended 0.25\u03a9 sense resistor with Kelvin connection. Tie to DGND if unused."+ },+ {+ "number": "30",+ "name": "GATE2",+ "type": "output",+ "description": "MOSFET gate driver for port 2. Drives the external pass N-MOSFET for port 2. Float if not used."+ },+ {+ "number": "31",+ "name": "OUT2",+ "type": "input",+ "description": "Output voltage sense pin for port 2. Connect to the output interface return for detection, classification, voltage sensing, and current-limit foldback control. Float if unused."+ },+ {+ "number": "32",+ "name": "SENSE1",+ "type": "input",+ "description": "Current-sense pin from the high-side sense resistor terminal for port 1. Recommended 0.25\u03a9 sense resistor with Kelvin connection. Tie to DGND if unused."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589838151171665920",+ "pages": 56,+ "sha256": "e746f450cbdd2478",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 32,+ "described": 32,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Monolithic Power Systems",+ "Package": "QFN-32(5x5)",+ "Category": "Power Management (PMIC)",+ "Pins": "32"+ }+ },+ "variants": [+ {+ "mpn": "MP3924GU-Z",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "mp3924gu-z"+ ],+ "discovery_pitch": "MP3924GU-Z (Monolithic Power Systems) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +288,5 @@ "docs/mp3924gu-z-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }