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MP3364GR-Z
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Monolithic Power Systems LED Drivers, QFN-24(4x4). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+224−8@@ -1,13 +1,234 @@ {+ "schema_version": 1,+ "type": "component", "slug": "mp3364gr-z",+ "title": "MP3364GR-Z",+ "brief": "Monolithic Power Systems LED Drivers, QFN-24(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Monolithic Power Systems LED Drivers, QFN-24(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "led drivers", "mp3364gr-z" ],+ "component": {+ "mpn": "MP3364GR-Z",+ "manufacturer": "Monolithic Power Systems",+ "package": "QFN-24(4x4)",+ "pin_count": 25,+ "category": "LED Drivers",+ "subcategory": "LED Drivers",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590922716013158400",+ "parts": {+ "symbol": "mp3364gr-z.kicad_sym",+ "footprint": "mp3364gr-z.kicad_mod",+ "model_3d": "mp3364gr-z.glb",+ "model_3d_step": "mp3364gr-z.step",+ "lbr": "mp3364gr-z.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "DIM",+ "type": "input",+ "description": "PWM signal input pin for brightness control. Internally pulled low; recommended PWM frequency 100Hz to 20kHz. VDIM_LO = 0.4V (max, falling), VDIM_HI = 1.2V (min, rising)."+ },+ {+ "number": "2",+ "name": "MIX/AD",+ "type": "input",+ "description": "Dimming mode setting pin with 18\u03bcA current-source output. Voltage set by external resistor: <0.3V = mixed dimming, 0.5V-0.8V = PWM dimming, 1.0V-1.3V = analog dimming; float to use internal MODE register."+ },+ {+ "number": "3",+ "name": "FREQ/SYNC",+ "type": "bidirectional",+ "description": "Switching frequency setting and external SYNC pin. Resistor to GND sets fSW (fSW(kHz)=22000/R(k\u03a9)), or drive with an external clock to synchronize. Float to use internal FSW1:0 register. VFREQ \u2248 0.6V."+ },+ {+ "number": "4",+ "name": "EN",+ "type": "input",+ "description": "IC enable pin. Pull high to enable (VEN_ON = 1.2V min rising), pull low to shut down (VEN_OFF = 0.4V max falling). 1M\u03a9 internal pull-down resistor."+ },+ {+ "number": "5",+ "name": "SCL/PSE",+ "type": "bidirectional",+ "description": "I2C interface clock input. Alternatively, tie SCL/PSE together with SDA/PSE and bias between 0.75V and 1V to enable the phase-shift PWM dimming function. Tie to GND if phase shift is not used."+ },+ {+ "number": "6",+ "name": "SDA/PSE",+ "type": "bidirectional",+ "description": "I2C interface data input. Alternatively, tie SDA/PSE together with SCL/PSE and bias between 0.75V and 1V to enable the phase-shift PWM dimming function. Tie to GND if phase shift is not used."+ },+ {+ "number": "7",+ "name": "COMP",+ "type": "passive",+ "description": "Loop compensation pin for the boost converter error amplifier. Connect an RC compensation network from COMP to AGND. GCOMP \u2248 100\u03bcA/V; source/sink limits 90\u03bcA/30\u03bcA."+ },+ {+ "number": "8",+ "name": "FF",+ "type": "output",+ "description": "Fault flag output. Open-drain; high (via external pull-up) during normal operation and pulled low if a fault occurs. VOL = 0.4V max at ILOAD = 3mA."+ },+ {+ "number": "9",+ "name": "ISET",+ "type": "passive",+ "description": "LED full-scale current setting. Tie a resistor from ISET to GND to set per-string LED current: ILED(mA) = 1245/R_ISET(k\u03a9). VISET \u2248 1.2V; RISET = 24.9k\u03a9 yields ILED = 50mA."+ },+ {+ "number": "10",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground reference. All logic signals must be referenced to AGND. Externally connect to PGND and to the exposed pad."+ },+ {+ "number": "11",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground reference. All logic signals must be referenced to AGND. Externally connect to PGND and to the exposed pad."+ },+ {+ "number": "12",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground reference. All logic signals must be referenced to AGND. Externally connect to PGND and to the exposed pad."+ },+ {+ "number": "13",+ "name": "LED4",+ "type": "input",+ "description": "LED string 4 current input (cathode). Sinks up to 150mA of regulated string current. Headroom VHD \u2248 350mV at 20mA, \u2248850mV at 100mA. Absolute max 50V. Tie to GND if unused (auto-detected)."+ },+ {+ "number": "14",+ "name": "LED3",+ "type": "input",+ "description": "LED string 3 current input (cathode). Sinks up to 150mA of regulated string current. Headroom VHD \u2248 350mV at 20mA, \u2248850mV at 100mA. Absolute max 50V."+ },+ {+ "number": "15",+ "name": "LED2",+ "type": "input",+ "description": "LED string 2 current input (cathode). Sinks up to 150mA of regulated string current. Headroom VHD \u2248 350mV at 20mA, \u2248850mV at 100mA. Absolute max 50V."+ },+ {+ "number": "16",+ "name": "LED1",+ "type": "input",+ "description": "LED string 1 current input (cathode). Sinks up to 150mA of regulated string current. Headroom VHD \u2248 350mV at 20mA, \u2248850mV at 100mA. Absolute max 50V."+ },+ {+ "number": "17",+ "name": "PGND",+ "type": "power_in",+ "description": "Step-up converter power ground; source of the internal low-side MOSFET. Route away from logic and connect externally to AGND with a short, low-inductance path."+ },+ {+ "number": "18",+ "name": "SW",+ "type": "power_out",+ "description": "Drain of the internal low-side N-channel MOSFET switch (RDS(ON) \u2248 100m\u03a9). Connect the boost inductor here. Absolute max 50V (transient -1.0V <100ns)."+ },+ {+ "number": "19",+ "name": "OVP",+ "type": "input",+ "description": "Over-voltage protection sense input. Connect a resistor divider from VOUT to OVP to GND to set the OVP threshold; internal VOVP \u2248 2V (nominal), 200mV hysteresis, 100mV UVLO threshold for VOUT-short detection."+ },+ {+ "number": "20",+ "name": "STH",+ "type": "passive",+ "description": "Short-LED protection threshold set pin, 18\u03bcA current source. Connect a resistor to GND: V_STH = 0.18 \u00d7 R_STH(k\u03a9); actual threshold is 10 \u00d7 V_STH. Float to use internal TH_S1:0 register (2.5V/5V/7.5V/10V)."+ },+ {+ "number": "21",+ "name": "ADR",+ "type": "input",+ "description": "I2C slave address select. 18\u03bcA pull-up: floating \u2192 0x38, <0.4V \u2192 0x3A, 0.4V-1.4V \u2192 0x39. Program via resistor to GND."+ },+ {+ "number": "22",+ "name": "VCC",+ "type": "power_out",+ "description": "Internal 5V LDO output that powers the internal logic and gate driver. Bypass to AGND with a ceramic capacitor (e.g., 1\u03bcF) placed close to the pin. Valid for 6V < VIN < 24V, 0-10mA load."+ },+ {+ "number": "23",+ "name": "SD",+ "type": "output",+ "description": "Gate drive for an optional external disconnect P-channel MOSFET between VIN and VOUT path. Turns off the external PMOS when a fault occurs (VIN \u2212 VSD \u2248 6V clamp; 60\u03bcA pull-down current). Float if unused."+ },+ {+ "number": "24",+ "name": "VIN",+ "type": "power_in",+ "description": "Power supply input to the IC. Operating range 3.5V to 36V (absolute max 42V). UVLO rising threshold \u2248 3.1V with 100mV hysteresis. Bypass to PGND with a low-ESR ceramic (e.g., 10\u03bcF)."+ },+ {+ "number": "EP",+ "name": "AGND",+ "type": "power_in",+ "description": "Exposed thermal pad on the bottom of the QFN. Connect to AGND with multiple vias for electrical reference and heat sinking (\u03b8JA = 42\u00b0C/W on JESD51-7 4-layer PCB)."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590922716013158400",+ "pages": null,+ "sha256": "2d17e143ea0f3bae",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 25,+ "described": 25,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Monolithic Power Systems",+ "Package": "QFN-24(4x4)",+ "Category": "LED Drivers",+ "Pins": "25"+ }+ },+ "variants": [+ {+ "mpn": "MP3364GR-Z",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "mp3364gr-z"+ ],+ "discovery_pitch": "MP3364GR-Z (Monolithic Power Systems) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +246,5 @@ "docs/mp3364gr-z-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }