component
MCP4922
Public Made by Adomby adom
Microchip dual 12-bit SPI DAC, SOIC-14. Buffered outputs, external VREF, synchronized update (LDAC). Datasheet-verified.
← Commit history
MCP4922: validated Fusion/EAGLE library + adom-lbr hub, generated from this page's KiCad sources
2 files changed
+976
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MCP4922.lbradded+167@@ -0,0 +1,167 @@+<?xml version="1.0" encoding="utf-8"?>+<!DOCTYPE eagle SYSTEM "eagle.dtd">+<eagle version="9.6.2">+<drawing>+<settings><setting alwaysvectorfont="no"/></settings>+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>+<layers>+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>+<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="22" name="bPlace" color="7" fill="1" visible="yes" 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<wire x1="5.7150" y1="-0.6350" x2="6.9850" y2="1.2700" width="0.1524" layer="94"/>+ <wire x1="6.9850" y1="-3.8100" x2="5.7150" y2="-1.9050" width="0.1524" layer="94"/>+ <wire x1="5.7150" y1="-1.9050" x2="1.2700" y2="-1.9050" width="0.1524" layer="94"/>+ <wire x1="1.2700" y1="-1.9050" x2="1.2700" y2="-5.7150" width="0.1524" layer="94"/>+ <wire x1="1.2700" y1="-5.7150" x2="5.7150" y2="-5.7150" width="0.1524" layer="94"/>+ <wire x1="5.7150" y1="-5.7150" x2="6.9850" y2="-3.8100" width="0.1524" layer="94"/>+ <text x="0" y="10.16" size="1.27" layer="95" align="bottom-center">>NAME</text>+ <text x="0" y="-12.7" size="1.27" layer="96" align="top-center">>VALUE</text>+ <pin name="Vdd" x="0" y="10.16" length="short" direction="pwr" rot="R270"/>+ <pin name="NC" x="-7.62" y="-10.16" length="short" direction="io" rot="R90"/>+ <pin name="~{CS}" x="-12.7" y="-7.62" length="short" direction="in"/>+ <pin name="SCK" x="-12.7" y="0" length="short" direction="in"/>+ <pin name="SDI" x="-12.7" y="-5.08" length="short" direction="in"/>+ <pin name="NC@2" x="-5.08" y="-10.16" length="short" direction="io" rot="R90"/>+ <pin name="NC@3" x="-2.54" y="-10.16" length="short" direction="io" rot="R90"/>+ <pin name="~{LDAC}" x="-12.7" y="-2.54" length="short" direction="in"/>+ <pin name="~{SHDN}" x="-12.7" y="5.08" length="short" direction="in"/>+ <pin name="VB" x="12.7" y="-5.08" length="short" direction="out" rot="R180"/>+ <pin name="VrefB" x="12.7" y="-7.62" length="short" direction="in" rot="R180"/>+ <pin name="Vss" x="0" y="-12.7" length="short" direction="pwr" rot="R90"/>+ <pin name="VrefA" x="12.7" y="5.08" length="short" direction="in" rot="R180"/>+ <pin name="VA" x="12.7" y="2.54" length="short" direction="out" rot="R180"/>+ <text x="-9.16" y="-6.731" size="0.762" layer="94" font="vector" ratio="15">CNTRL</text>+ <text x="9.16" y="1.27" size="0.762" layer="94" font="vector" ratio="15" align="right">DAC</text>+ <text x="9.16" y="-3.81" size="0.762" layer="94" font="vector" ratio="15" align="right">DAC</text>+</symbol>+</symbols>+<devicesets>+<deviceset name="MCP4922" prefix="U">+ <description>2-Channel 8-Bit D/A Converters with SPI Interface</description>+ <gates>+ <gate name="G$1" symbol="MCP4922" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="MCP4922">+ <connects>+ <connect gate="G$1" pin="Vdd" pad="1"/>+ <connect gate="G$1" pin="NC" pad="2"/>+ <connect gate="G$1" pin="~{CS}" pad="3"/>+ <connect gate="G$1" pin="SCK" pad="4"/>+ <connect gate="G$1" pin="SDI" pad="5"/>+ <connect gate="G$1" pin="NC@2" pad="6"/>+ <connect gate="G$1" pin="NC@3" pad="7"/>+ <connect gate="G$1" pin="~{LDAC}" pad="8"/>+ <connect gate="G$1" pin="~{SHDN}" pad="9"/>+ <connect gate="G$1" pin="VB" pad="10"/>+ <connect gate="G$1" pin="VrefB" pad="11"/>+ <connect gate="G$1" pin="Vss" pad="12"/>+ <connect gate="G$1" pin="VrefA" pad="13"/>+ <connect gate="G$1" pin="VA" pad="14"/>+ </connects>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+</devicesets>+</library>+</drawing>+</eagle>