component
MCP4251T-103E
Public Made by Adomby adom
Microchip Tech Digital Potentiometers, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+50@@ -0,0 +1,50 @@+# MCP4251T-103E++**Microchip Tech** · Digital Potentiometers · SOIC-14++MCP4251T-103E from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CS | input | SPI Chip Select Input; forcing CS to VIL enables normal serial commands, forcing to VIHH enables high-voltage serial commands; high-voltage tolerant input with Schmitt trigger. |+| 2 | SCK | input | SPI Serial Clock Input; supports up to 10 MHz operation for normal commands; high-voltage tolerant input with Schmitt trigger. |+| 3 | SDI | input | SPI Serial Data Input; data is latched on the rising edge of SCK and connected to host controller SDO pin; high-voltage tolerant input with Schmitt trigger. |+| 4 | VSS | power_in | Device ground reference; 100 mA maximum current sinking capability. |+| 5 | P1B | passive | Potentiometer 1 Terminal B (fixed zero-scale connection); supports ±2.5 mA maximum current; voltage range VSS to VDD. |+| 6 | P1W | passive | Potentiometer 1 Wiper Terminal (adjustable connection); supports ±2.5 mA maximum current; voltage range VSS to VDD. |+| 7 | P1A | passive | Potentiometer 1 Terminal A (fixed full-scale connection); supports ±2.5 mA maximum current; voltage range VSS to VDD. |+| 8 | P0A | passive | Potentiometer 0 Terminal A (fixed full-scale connection); supports ±2.5 mA maximum current; voltage range VSS to VDD. |+| 9 | P0W | passive | Potentiometer 0 Wiper Terminal (adjustable connection); supports ±2.5 mA maximum current; voltage range VSS to VDD. |+| 10 | P0B | passive | Potentiometer 0 Terminal B (fixed zero-scale connection); supports ±2.5 mA maximum current; voltage range VSS to VDD. |+| 11 | NC | unconnected | No Connection; internally unconnected and should be connected to VDD or VSS to reduce possible noise coupling. |+| 12 | SHDN | input | Hardware Shutdown Input; forcing low disconnects P0A and P1A terminals and connects P0W to P0B and P1W to P1B; high-voltage tolerant input with Schmitt trigger. |+| 13 | SDO | output | SPI Serial Data Output; open-drain output with internal smart pull-up driven on falling edge of SCK; outputs 25 mA maximum current sinking. |+| 14 | VDD | power_in | Positive Power Supply Input; 2.7 V to 5.5 V operating range (1.8 V to 2.7 V for serial interface only); place 0.1 µF bypass capacitor within 4 mm; 100 mA maximum current sourcing. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Microchip Tech |+| Package | SOIC-14 |+| Category | Data Acquisition |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `MCP4251T-103E`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOIC-14 (KiCad packages3D, STEP)+- 3D model files: `mcp4251t-103e-etched.step` / `mcp4251t-103e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mcp4251t-103e.step` / `mcp4251t-103e.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Microchip Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589040304335175680) (88 pp, sha256 `6c60b083b2ef0a92`, retrieved 2026-09-22, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/mcp4251t-103e-datasheet.pdf)
page.jsonadded+177@@ -0,0 +1,177 @@+{+ "slug": "mcp4251t-103e",+ "version": "0.1.0",+ "type": "component",+ "description": "Microchip Tech Digital Potentiometers, SOIC-14. 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