MCP23S17 SPI GPIO Expander

@@ -1,8 +1,11 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "mcp23s17",+  "title": "MCP23S17 SPI GPIO Expander",+  "brief": "16-bit general-purpose I/O expander with an SPI interface and interrupt outputs.",   "version": "0.1.0",-  "type": "component",-  "description": "16-bit general-purpose I/O expander with an SPI interface and interrupt outputs.",+  "license": "CC-BY-SA-4.0",   "tags": [     "gpio-expander",     "spi",@@ -11,6 +14,240 @@     "microchip",     "soic-28"   ],+  "component": {+    "mpn": "MCP23S17",+    "manufacturer": "Microchip",+    "package": "SOIC-28",+    "pin_count": 28,+    "category": "Interface",+    "subcategory": "I/O Expander",+    "datasheet": "https://ww1.microchip.com/downloads/en/DeviceDoc/20001952C.pdf",+    "parts": {+      "symbol": "mcp23s17.kicad_sym",+      "footprint": "mcp23s17.kicad_mod",+      "model_3d": "mcp23s17.glb"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "GPB0",+        "type": "bidirectional",+        "description": "PORTB bit 0 bidirectional I/O. Can be enabled for interrupt-on-change and/or internal weak pull-up. Defaults to input at power-up. Max sink/source 25 mA per pin."+      },+      {+        "number": "2",+        "name": "GPB1",+        "type": "bidirectional",+        "description": "PORTB bit 1 bidirectional I/O. Can be enabled for interrupt-on-change and/or internal weak pull-up. Defaults to input at power-up."+      },+      {+        "number": "3",+        "name": "GPB2",+        "type": "bidirectional",+        "description": "PORTB bit 2 bidirectional I/O. Can be enabled for interrupt-on-change and/or internal weak pull-up. Defaults to input at power-up."+      },+      {+        "number": "4",+        "name": "GPB3",+        "type": "bidirectional",+        "description": "PORTB bit 3 bidirectional I/O. Can be enabled for interrupt-on-change and/or internal weak pull-up. Defaults to input at power-up."+      },+      {+        "number": "5",+        "name": "GPB4",+        "type": "bidirectional",+        "description": "PORTB bit 4 bidirectional I/O. Can be enabled for interrupt-on-change and/or internal weak pull-up. Defaults to input at power-up."+      },+      {+        "number": "6",+        "name": "GPB5",+        "type": "bidirectional",+        "description": "PORTB bit 5 bidirectional I/O. Can be enabled for interrupt-on-change and/or internal weak pull-up. Defaults to input at power-up."+      },+      {+        "number": "7",+        "name": "GPB6",+        "type": "bidirectional",+        "description": "PORTB bit 6 bidirectional I/O. Can be enabled for interrupt-on-change and/or internal weak pull-up. Defaults to input at power-up."+      },+      {+        "number": "8",+        "name": "GPB7",+        "type": "bidirectional",+        "description": "PORTB bit 7 bidirectional I/O. Can be enabled for interrupt-on-change and/or internal weak pull-up. Defaults to input at power-up."+      },+      {+        "number": "9",+        "name": "VDD",+        "type": "power_in",+        "description": "Positive supply. Operating range 1.8 V to 5.5 V (-40 to +85 C), 2.7 V to 5.5 V (-40 to +85 C), or 4.5 V to 5.5 V (-40 to +125 C). Decouple to VSS with a local bypass capacitor."+      },+      {+        "number": "10",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground reference. Return for all device currents; connect to system ground plane."+      },+      {+        "number": "11",+        "name": "CS",+        "type": "input",+        "description": "SPI chip select input (active-low). Frames each SPI transaction; must be driven low to enable serial communication with this device."+      },+      {+        "number": "12",+        "name": "SCK",+        "type": "input",+        "description": "SPI serial clock input. Maximum 10 MHz. Clocks data into SI on the master-configured edge and out on SO."+      },+      {+        "number": "13",+        "name": "SI",+        "type": "input",+        "description": "SPI serial data input (MOSI). Receives command, address and write-data bytes from the SPI master."+      },+      {+        "number": "14",+        "name": "SO",+        "type": "output",+        "description": "SPI serial data output (MISO). Drives read-data back to the SPI master; high-impedance while CS is high."+      },+      {+        "number": "15",+        "name": "A0",+        "type": "input",+        "description": "Hardware address bit 0. Sets the least-significant bit of the 3-bit chip address matched during SPI transactions. Must be externally biased (tied to VDD or VSS); do not leave floating."+      },+      {+        "number": "16",+        "name": "A1",+        "type": "input",+        "description": "Hardware address bit 1. Must be externally biased (tied to VDD or VSS)."+      },+      {+        "number": "17",+        "name": "A2",+        "type": "input",+        "description": "Hardware address bit 2. Must be externally biased (tied to VDD or VSS). Combined with A0/A1 allows up to eight MCP23S17 devices to share one SPI bus."+      },+      {+        "number": "18",+        "name": "RESET",+        "type": "input",+        "description": "Active-low hardware reset input. Forces all registers to their POR defaults while asserted. Must be externally biased (tie to VDD through a pull-up if unused); do not leave floating."+      },+      {+        "number": "19",+        "name": "INTB",+        "type": "output",+        "description": "Interrupt output for PORTB. Polarity and drive configurable as active-high, active-low, or open-drain via IOCON.INTPOL/ODR. Can be OR'd with INTA when IOCON.MIRROR = 1."+      },+      {+        "number": "20",+        "name": "INTA",+        "type": "output",+        "description": "Interrupt output for PORTA. Polarity and drive configurable as active-high, active-low, or open-drain via IOCON.INTPOL/ODR. Can be OR'd with INTB when IOCON.MIRROR = 1."+      },+      {+        "number": "21",+        "name": "GPA0",+        "type": "bidirectional",+        "description": "PORTA bit 0 bidirectional I/O. Can be enabled for interrupt-on-change and/or internal weak pull-up. Defaults to input at power-up."+      },+      {+        "number": "22",+        "name": "GPA1",+        "type": "bidirectional",+        "description": "PORTA bit 1 bidirectional I/O. Can be enabled for interrupt-on-change and/or internal weak pull-up. Defaults to input at power-up."+      },+      {+        "number": "23",+        "name": "GPA2",+        "type": "bidirectional",+        "description": "PORTA bit 2 bidirectional I/O. Can be enabled for interrupt-on-change and/or internal weak pull-up. Defaults to input at power-up."+      },+      {+        "number": "24",+        "name": "GPA3",+        "type": "bidirectional",+        "description": "PORTA bit 3 bidirectional I/O. Can be enabled for interrupt-on-change and/or internal weak pull-up. Defaults to input at power-up."+      },+      {+        "number": "25",+        "name": "GPA4",+        "type": "bidirectional",+        "description": "PORTA bit 4 bidirectional I/O. Can be enabled for interrupt-on-change and/or internal weak pull-up. Defaults to input at power-up."+      },+      {+        "number": "26",+        "name": "GPA5",+        "type": "bidirectional",+        "description": "PORTA bit 5 bidirectional I/O. Can be enabled for interrupt-on-change and/or internal weak pull-up. Defaults to input at power-up."+      },+      {+        "number": "27",+        "name": "GPA6",+        "type": "bidirectional",+        "description": "PORTA bit 6 bidirectional I/O. Can be enabled for interrupt-on-change and/or internal weak pull-up. Defaults to input at power-up."+      },+      {+        "number": "28",+        "name": "GPA7",+        "type": "bidirectional",+        "description": "PORTA bit 7 bidirectional I/O. Can be enabled for interrupt-on-change and/or internal weak pull-up. Defaults to input at power-up."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://ww1.microchip.com/downloads/en/DeviceDoc/20001952C.pdf",+        "pages": 42,+        "sha256": "14159c6f5655e943",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 28,+        "described": 28,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Type": "16-bit I/O expander",+      "Interface": "SPI (up to 10 MHz)",+      "I/O": "16, two 8-bit ports (GPA/GPB)",+      "Per-pin features": "Direction, pull-up, polarity, interrupt-on-change",+      "Addressing": "3 hardware address pins (up to 8 on a bus)",+      "Supply voltage": "1.8 V to 5.5 V",+      "Operating temperature": "-40 C to 85 C"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "SPI GPIO expander",+    "add more I/O",+    "port expander",+    "16-bit I/O over SPI"+  ],+  "discovery_pitch": "Add 16 interrupt-capable GPIOs to an MCU over SPI, with up to 8 devices on one bus via hardware address pins.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -26,10 +263,5 @@     "docs/mcp23s17-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file