MC74LVX08DTR2G

@@ -1,13 +1,176 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "mc74lvx08dtr2g",+  "title": "MC74LVX08DTR2G",+  "brief": "onsemi Gates, TSSOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "onsemi Gates, TSSOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",     "mc74lvx08dtr2g"   ],+  "component": {+    "mpn": "MC74LVX08DTR2G",+    "manufacturer": "onsemi",+    "package": "TSSOP-14",+    "pin_count": 14,+    "category": "Logic",+    "subcategory": "Gates",+    "datasheet": "https://www.onsemi.com/pdf/datasheet/mc74lvx08dtr2-d.pdf",+    "parts": {+      "symbol": "mc74lvx08dtr2g.kicad_sym",+      "footprint": "mc74lvx08dtr2g.kicad_mod",+      "model_3d": "mc74lvx08dtr2g.glb",+      "model_3d_step": "mc74lvx08dtr2g.step",+      "lbr": "mc74lvx08dtr2g.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "A0",+        "type": "input",+        "description": "Gate 0 data input A. CMOS logic input, 5 V tolerant (up to 7.0 V DC input voltage rating). VIH min = 2.0 V at VCC = 3.0 V; VIL max = 0.8 V. Input leakage +/-1 uA max."+      },+      {+        "number": "2",+        "name": "B0",+        "type": "input",+        "description": "Gate 0 data input B. CMOS logic input, 5 V tolerant (up to 7.0 V DC input voltage rating). Combined with A0 through a 2-input AND to drive O0."+      },+      {+        "number": "3",+        "name": "O0",+        "type": "output",+        "description": "Gate 0 output = A0 AND B0. Push-pull CMOS output; VOH >= 2.48 V @ IOH = -4 mA, VOL <= 0.44 V @ IOL = 4 mA (VCC = 3.0 V). Max DC output current +/-25 mA per pin."+      },+      {+        "number": "4",+        "name": "A1",+        "type": "input",+        "description": "Gate 1 data input A. CMOS logic input, 5 V tolerant (up to 7.0 V DC input voltage rating)."+      },+      {+        "number": "5",+        "name": "B1",+        "type": "input",+        "description": "Gate 1 data input B. CMOS logic input, 5 V tolerant (up to 7.0 V DC input voltage rating). Combined with A1 through a 2-input AND to drive O1."+      },+      {+        "number": "6",+        "name": "O1",+        "type": "output",+        "description": "Gate 1 output = A1 AND B1. Push-pull CMOS output; VOH >= 2.48 V @ IOH = -4 mA, VOL <= 0.44 V @ IOL = 4 mA (VCC = 3.0 V)."+      },+      {+        "number": "7",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference (0 V). Return for VCC and all logic signals."+      },+      {+        "number": "8",+        "name": "O3",+        "type": "output",+        "description": "Gate 3 output = A3 AND B3. Push-pull CMOS output; VOH >= 2.48 V @ IOH = -4 mA, VOL <= 0.44 V @ IOL = 4 mA (VCC = 3.0 V)."+      },+      {+        "number": "9",+        "name": "B3",+        "type": "input",+        "description": "Gate 3 data input B. CMOS logic input, 5 V tolerant (up to 7.0 V DC input voltage rating). Combined with A3 through a 2-input AND to drive O3."+      },+      {+        "number": "10",+        "name": "A3",+        "type": "input",+        "description": "Gate 3 data input A. CMOS logic input, 5 V tolerant (up to 7.0 V DC input voltage rating)."+      },+      {+        "number": "11",+        "name": "O2",+        "type": "output",+        "description": "Gate 2 output = A2 AND B2. Push-pull CMOS output; VOH >= 2.48 V @ IOH = -4 mA, VOL <= 0.44 V @ IOL = 4 mA (VCC = 3.0 V)."+      },+      {+        "number": "12",+        "name": "B2",+        "type": "input",+        "description": "Gate 2 data input B. CMOS logic input, 5 V tolerant (up to 7.0 V DC input voltage rating). Combined with A2 through a 2-input AND to drive O2."+      },+      {+        "number": "13",+        "name": "A2",+        "type": "input",+        "description": "Gate 2 data input A. CMOS logic input, 5 V tolerant (up to 7.0 V DC input voltage rating)."+      },+      {+        "number": "14",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply voltage. Recommended operating range 2.0 V to 3.6 V; absolute maximum -0.5 V to +7.0 V. Quiescent supply current 2 uA (max) at 25 C. Bypass with a 0.1 uF ceramic capacitor to GND close to the pin."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.onsemi.com/pdf/datasheet/mc74lvx08dtr2-d.pdf",+        "pages": 5,+        "sha256": "7bcb7c39dade52c5",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "onsemi",+      "Package": "TSSOP-14",+      "Category": "Logic",+      "Pins": "14"+    }+  },+  "variants": [+    {+      "mpn": "MC74LVX08DTR2G",+      "kind": "packaging"+    },+    {+      "mpn": "MC74LVX08DTR2GDTG",+      "kind": "packaging"+    },+    {+      "mpn": "MC74LVX08DTR2GDR2G",+      "kind": "packaging"+    }+  ],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "mc74lvx08dtr2g"+  ],+  "discovery_pitch": "MC74LVX08DTR2G (onsemi) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +188,5 @@     "docs/mc74lvx08dtr2g-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file