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Initial commit: component/mc74hc86adr2g

Ray ·0adbed0e6e ·2mo ago
2 files changed +94
README.mdadded+60
@@ -0,0 +1,60 @@+# MC74HC86ADR2G++**onsemi** · Gates · SOIC-14++MC74HC86ADR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A1 | input | Gate 1 input A. CMOS logic input (V_IH >= 0.7*V_CC typ, V_IL <= 0.2*V_CC typ). Input leakage <= 1 uA. |+| 2 | B1 | input | Gate 1 input B. CMOS logic input; XOR'd with A1 to produce Y1. |+| 3 | Y1 | output | Gate 1 output = A1 XOR B1. Push-pull CMOS output; drive capability 10 LSTTL loads. |+| 4 | A2 | input | Gate 2 input A. CMOS logic input. |+| 5 | B2 | input | Gate 2 input B. CMOS logic input; XOR'd with A2 to produce Y2. |+| 6 | Y2 | output | Gate 2 output = A2 XOR B2. Push-pull CMOS output. |+| 7 | GND | power_in | Ground reference (0 V). Common return for V_CC supply and all logic signals. |+| 8 | Y3 | output | Gate 3 output = A3 XOR B3. Push-pull CMOS output. |+| 9 | A3 | input | Gate 3 input A. CMOS logic input. |+| 10 | B3 | input | Gate 3 input B. CMOS logic input; XOR'd with A3 to produce Y3. |+| 11 | Y4 | output | Gate 4 output = A4 XOR B4. Push-pull CMOS output. |+| 12 | A4 | input | Gate 4 input A. CMOS logic input. |+| 13 | B4 | input | Gate 4 input B. CMOS logic input; XOR'd with A4 to produce Y4. |+| 14 | VCC | power_in | Positive supply, 2.0 V to 6.0 V (referenced to GND). Bypass with a 0.1 uF ceramic close to the pin. Absolute max 7.0 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOIC-14 |+| Category | Logic |+| Pins | 14 |++## Ordering variants++Same part, different packaging or reel option.++- `MC74HC86ADG`+- `MC74HC86ADR2G`+- `MC74HC86ADR2GNLV74HC86ADG`+- `MC74HC86ADR2GNLV74HC86ADR2G`+- `MC74HC86ADTR2G`+- `MC74HC86ADR2GNLV74HC86ADTR2G`++## CAD (KiCad official)++- Symbol: `MC74HC86ADR2G`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOIC-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mc74hc86a-d.pdf) (6 pp, sha256 `5468078d3c417983`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/mc74hc86adr2g-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "mc74hc86adr2g",+  "version": "0.1.0",+  "type": "component",+  "description": "onsemi Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "mc74hc86adr2g"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "mc74hc86adr2g.kicad_sym",+    "mc74hc86adr2g.kicad_mod",+    "mc74hc86adr2g.glb",+    "mc74hc86adr2g.step",+    "mc74hc86adr2g.lbr",+    "docs/hero.png",+    "docs/mc74hc86adr2g-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file