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mc74hc74adr2g: factory component page (tier=mfr)

Ray ·8cfea5dd93 ·2mo ago ·parent c70fc87
1 file changed +152−8
page.json+152−8
@@ -1,13 +1,162 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "mc74hc74adr2g",+  "title": "MC74HC74ADR2G",+  "brief": "onsemi Flip Flops, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "onsemi Flip Flops, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",     "mc74hc74adr2g"   ],+  "component": {+    "mpn": "MC74HC74ADR2G",+    "manufacturer": "onsemi",+    "package": "SOIC-14",+    "pin_count": 14,+    "category": "Logic",+    "subcategory": "Flip Flops",+    "datasheet": "https://www.onsemi.com/pdf/datasheet/mc74hc74a-d.pdf",+    "parts": {+      "symbol": "mc74hc74adr2g.kicad_sym",+      "footprint": "mc74hc74adr2g.kicad_mod",+      "model_3d": "mc74hc74adr2g.glb",+      "model_3d_step": "mc74hc74adr2g.step",+      "lbr": "mc74hc74adr2g.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "RESET1",+        "type": "input",+        "description": "Asynchronous active-low reset for flip-flop 1. When low, forces Q1 low and Q1\u0304 high independent of clock."+      },+      {+        "number": "2",+        "name": "DATA1",+        "type": "input",+        "description": "D-input for flip-flop 1. Sampled on the rising edge of CLOCK1 and transferred to Q1."+      },+      {+        "number": "3",+        "name": "CLOCK1",+        "type": "input",+        "description": "Clock input for flip-flop 1. Rising edge transfers DATA1 to Q1. Max clock frequency 35 MHz at Vcc=6 V."+      },+      {+        "number": "4",+        "name": "SET1",+        "type": "input",+        "description": "Asynchronous active-low set for flip-flop 1. When low, forces Q1 high and Q1\u0304 low independent of clock."+      },+      {+        "number": "5",+        "name": "Q1",+        "type": "output",+        "description": "True (non-inverted) output of flip-flop 1. Drives 10 LSTTL loads."+      },+      {+        "number": "6",+        "name": "~Q1",+        "type": "output",+        "description": "Complementary (inverted) output of flip-flop 1."+      },+      {+        "number": "7",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference (0 V)."+      },+      {+        "number": "8",+        "name": "~Q2",+        "type": "output",+        "description": "Complementary (inverted) output of flip-flop 2."+      },+      {+        "number": "9",+        "name": "Q2",+        "type": "output",+        "description": "True (non-inverted) output of flip-flop 2. Drives 10 LSTTL loads."+      },+      {+        "number": "10",+        "name": "SET2",+        "type": "input",+        "description": "Asynchronous active-low set for flip-flop 2. When low, forces Q2 high and Q2\u0304 low independent of clock."+      },+      {+        "number": "11",+        "name": "CLOCK2",+        "type": "input",+        "description": "Clock input for flip-flop 2. Rising edge transfers DATA2 to Q2."+      },+      {+        "number": "12",+        "name": "DATA2",+        "type": "input",+        "description": "D-input for flip-flop 2. Sampled on the rising edge of CLOCK2 and transferred to Q2."+      },+      {+        "number": "13",+        "name": "RESET2",+        "type": "input",+        "description": "Asynchronous active-low reset for flip-flop 2. When low, forces Q2 low and Q2\u0304 high independent of clock."+      },+      {+        "number": "14",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply. 2.0 V to 6.0 V for HC; 4.5 V to 5.5 V for HCT variant. Absolute max 6.5 V."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.onsemi.com/pdf/datasheet/mc74hc74a-d.pdf",+        "pages": 13,+        "sha256": "39ae893cd4838f9c",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "onsemi",+      "Package": "SOIC-14",+      "Category": "Logic",+      "Pins": "14"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "mc74hc74adr2g"+  ],+  "discovery_pitch": "MC74HC74ADR2G (onsemi) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +174,5 @@     "docs/mc74hc74adr2g-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file