MC74HC4040ADTR2G

@@ -0,0 +1,57 @@+# MC74HC4040ADTR2G++**onsemi** · Counters / Dividers · TSSOP-16++MC74HC4040ADTR2G from onsemi, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | Q12 | output | Active-high counter output, divides Clock by 2^12 (4096). Push-pull CMOS output; drives up to 10 LSTTL loads at V_CC = 4.5 V. |+| 2 | Q6 | output | Active-high counter output, divides Clock by 2^6 (64). Push-pull CMOS output. |+| 3 | Q5 | output | Active-high counter output, divides Clock by 2^5 (32). Push-pull CMOS output. |+| 4 | Q7 | output | Active-high counter output, divides Clock by 2^7 (128). Push-pull CMOS output. |+| 5 | Q4 | output | Active-high counter output, divides Clock by 2^4 (16). Push-pull CMOS output. |+| 6 | Q3 | output | Active-high counter output, divides Clock by 2^3 (8). Push-pull CMOS output. |+| 7 | Q2 | output | Active-high counter output, divides Clock by 2^2 (4). Push-pull CMOS output. |+| 8 | GND | power_in | Ground / 0 V reference for the device. Connect to system ground with a local decoupling capacitor between V_CC (pin 16) and GND. |+| 9 | Q1 | output | Active-high counter output, divides Clock by 2^1 (2). Push-pull CMOS output; typ. propagation delay Clock→Q1 is 31 ns at V_CC = 4.5 V, C_L = 50 pF. |+| 10 | Clock | input | Negative-edge-triggered clock input; a high-to-low transition advances the counter one state. V_IH ≥ 3.15 V and V_IL ≤ 1.35 V at V_CC = 4.5 V; f_max = 30 MHz typ at V_CC = 4.5 V. |+| 11 | Reset | input | Active-high asynchronous reset. A logic high on this pin immediately forces all Q outputs low, regardless of Clock. Must be held low for normal counting. |+| 12 | Q9 | output | Active-high counter output, divides Clock by 2^9 (512). Push-pull CMOS output. |+| 13 | Q8 | output | Active-high counter output, divides Clock by 2^8 (256). Push-pull CMOS output. |+| 14 | Q10 | output | Active-high counter output, divides Clock by 2^10 (1024). Push-pull CMOS output. |+| 15 | Q11 | output | Active-high counter output, divides Clock by 2^11 (2048). Push-pull CMOS output. |+| 16 | VCC | power_in | Positive supply, 2.0 V to 6.0 V (absolute max 7.0 V). Bypass locally to GND (pin 8) with a 0.1 µF ceramic capacitor. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | TSSOP-16 |+| Category | Logic |+| Pins | 16 |++## Ordering variants++- `MC74HC4040ADTR2GDTR2G`+- `MC74HC4040ADTR2GDG`+- `MC74HC4040ADTR2GDR2G`++## CAD (KiCad official)++- Symbol: `MC74HC4040ADTR2G`+- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`+- 3D model: TSSOP-16 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mc74hc4040adtr2-d.pdf) (8 pp, sha256 `50a2c7e682995a1f`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/mc74hc4040adtr2g-datasheet.pdf)

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