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Set visibility: public

Ray ·087e401fa4 ·1mo ago ·parent 3b1186b
1 file changed +7−4
page.json+7−4
@@ -80,13 +80,13 @@         "number": "9",         "name": "Q1",         "type": "output",-        "description": "Active-high counter output, divides Clock by 2^1 (2). Push-pull CMOS output; typ. propagation delay Clock\u2192Q1 is 31 ns at V_CC = 4.5 V, C_L = 50 pF."+        "description": "Active-high counter output, divides Clock by 2^1 (2). Push-pull CMOS output; typ. propagation delay Clock→Q1 is 31 ns at V_CC = 4.5 V, C_L = 50 pF."       },       {         "number": "10",         "name": "Clock",         "type": "input",-        "description": "Negative-edge-triggered clock input; a high-to-low transition advances the counter one state. V_IH \u2265 3.15 V and V_IL \u2264 1.35 V at V_CC = 4.5 V; f_max = 30 MHz typ at V_CC = 4.5 V."+        "description": "Negative-edge-triggered clock input; a high-to-low transition advances the counter one state. V_IH ≥ 3.15 V and V_IL ≤ 1.35 V at V_CC = 4.5 V; f_max = 30 MHz typ at V_CC = 4.5 V."       },       {         "number": "11",@@ -122,7 +122,7 @@         "number": "16",         "name": "VCC",         "type": "power_in",-        "description": "Positive supply, 2.0 V to 6.0 V (absolute max 7.0 V). Bypass locally to GND (pin 8) with a 0.1 \u00b5F ceramic capacitor."+        "description": "Positive supply, 2.0 V to 6.0 V (absolute max 7.0 V). Bypass locally to GND (pin 8) with a 0.1 µF ceramic capacitor."       }     ],     "provenance": {@@ -186,5 +186,8 @@     "docs/mc74hc4040adtr2g-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file