component
MC74HC165ADR2G
Public Made by Adomby adom
onsemi Shifting Register, SOIC-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+164−8@@ -1,13 +1,174 @@ {+ "schema_version": 1,+ "type": "component", "slug": "mc74hc165adr2g",+ "title": "MC74HC165ADR2G",+ "brief": "onsemi Shifting Register, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "onsemi Shifting Register, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "mc74hc165adr2g" ],+ "component": {+ "mpn": "MC74HC165ADR2G",+ "manufacturer": "onsemi",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Shifting Register",+ "datasheet": "https://www.onsemi.com/pdf/datasheet/mc74hc165a-d.pdf",+ "parts": {+ "symbol": "mc74hc165adr2g.kicad_sym",+ "footprint": "mc74hc165adr2g.kicad_mod",+ "model_3d": "mc74hc165adr2g.glb",+ "model_3d_step": "mc74hc165adr2g.step",+ "lbr": "mc74hc165adr2g.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "SH/~LD",+ "type": "input",+ "description": "Serial Shift / Parallel Load control. When low, the eight parallel inputs (A-H) are asynchronously loaded into the register. When high, data shifts serially on the rising clock edge."+ },+ {+ "number": "2",+ "name": "CLOCK",+ "type": "input",+ "description": "Clock input. Data is shifted on the rising edge when SH/~LD is high and Clock Inhibit is low. Combined with Clock Inhibit through an internal NOR."+ },+ {+ "number": "3",+ "name": "E",+ "type": "input",+ "description": "Parallel data input E (bit 4). Loaded into the register when SH/~LD is low."+ },+ {+ "number": "4",+ "name": "F",+ "type": "input",+ "description": "Parallel data input F (bit 5). Loaded into the register when SH/~LD is low."+ },+ {+ "number": "5",+ "name": "G",+ "type": "input",+ "description": "Parallel data input G (bit 6). Loaded into the register when SH/~LD is low."+ },+ {+ "number": "6",+ "name": "H",+ "type": "input",+ "description": "Parallel data input H (bit 7, last stage). Loaded when SH/~LD is low. Its state appears at QH after load."+ },+ {+ "number": "7",+ "name": "~QH",+ "type": "output",+ "description": "Complementary serial data output of the last (H) stage. Inverse of QH."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference (0 V)."+ },+ {+ "number": "9",+ "name": "QH",+ "type": "output",+ "description": "Serial data output of the last (H) stage. Follows the H flip-flop."+ },+ {+ "number": "10",+ "name": "SA",+ "type": "input",+ "description": "Serial data input into the A (first) stage. Shifted in on rising clock edge when SH/~LD is high."+ },+ {+ "number": "11",+ "name": "A",+ "type": "input",+ "description": "Parallel data input A (bit 0, first stage). Loaded when SH/~LD is low."+ },+ {+ "number": "12",+ "name": "B",+ "type": "input",+ "description": "Parallel data input B (bit 1). Loaded when SH/~LD is low."+ },+ {+ "number": "13",+ "name": "C",+ "type": "input",+ "description": "Parallel data input C (bit 2). Loaded when SH/~LD is low."+ },+ {+ "number": "14",+ "name": "D",+ "type": "input",+ "description": "Parallel data input D (bit 3). Loaded when SH/~LD is low."+ },+ {+ "number": "15",+ "name": "CLOCK_INHIBIT",+ "type": "input",+ "description": "Clock inhibit. Active-high; when high, clocking is disabled (register holds). The two clock sources (CLOCK and CLOCK INHIBIT) are combined via an internal 2-input NOR so either may serve as clock while the other acts as inhibit."+ },+ {+ "number": "16",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply, 2.0 V to 6.0 V. Bypass with a 100 nF ceramic to GND close to the pin."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.onsemi.com/pdf/datasheet/mc74hc165a-d.pdf",+ "pages": 12,+ "sha256": "9cdfdaa6f1619128",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "onsemi",+ "Package": "SOIC-16",+ "Category": "Logic",+ "Pins": "16"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "mc74hc165adr2g"+ ],+ "discovery_pitch": "MC74HC165ADR2G (onsemi) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +186,5 @@ "docs/mc74hc165adr2g-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }