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Initial commit: component/mc74hc08adtr2g

Ray ·7cf439cf6e ·1mo ago
2 files changed +94
README.mdadded+60
@@ -0,0 +1,60 @@+# MC74HC08ADTR2G++**onsemi** · Gates · TSSOP-14++MC74HC08ADTR2G from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A1 | input | Input A of AND gate 1. CMOS logic input, VIH ≥ 1.5 V @ VCC=2.0 V up to 4.2 V @ VCC=6.0 V; input leakage ±1 µA max. |+| 2 | B1 | input | Input B of AND gate 1. CMOS logic input compatible with LSTTL when pulled up. |+| 3 | Y1 | output | Output Y of AND gate 1 (Y1 = A1 · B1). Push-pull CMOS output; drives up to 10 LSTTL loads (IOL up to 5.2 mA at VCC=6.0 V). |+| 4 | A2 | input | Input A of AND gate 2. CMOS logic input. |+| 5 | B2 | input | Input B of AND gate 2. CMOS logic input. |+| 6 | Y2 | output | Output Y of AND gate 2 (Y2 = A2 · B2). Push-pull CMOS output. |+| 7 | GND | power_in | Ground reference (0 V). Return for all four gates and internal logic. |+| 8 | Y3 | output | Output Y of AND gate 3 (Y3 = A3 · B3). Push-pull CMOS output. |+| 9 | A3 | input | Input A of AND gate 3. CMOS logic input. |+| 10 | B3 | input | Input B of AND gate 3. CMOS logic input. |+| 11 | Y4 | output | Output Y of AND gate 4 (Y4 = A4 · B4). Push-pull CMOS output. |+| 12 | A4 | input | Input A of AND gate 4. CMOS logic input. |+| 13 | B4 | input | Input B of AND gate 4. CMOS logic input. Unused inputs must be tied to VCC or GND. |+| 14 | VCC | power_in | Positive supply, 2.0 V to 6.0 V (absolute max 7.0 V). Quiescent supply current 1 µA typ (per package) at 25 °C. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | TSSOP-14 |+| Category | Logic |+| Pins | 14 |++## Ordering variants++Same part, different packaging or reel option.++- `MC74HC08ADTR2G`+- `MC74HC08ADTR2GNLV74HC08ADTR2G`+- `MC74HC08ADTR2GADG`+- `MC74HC08ADTR2GADR2G`+- `MC74HC08ADTR2GNLV74HC08ADG`+- `MC74HC08ADTR2GNLV74HC08ADR2G`++## CAD (KiCad official)++- Symbol: `MC74HC08ADTR2G`+- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`+- 3D model: TSSOP-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mc74hc08adtr2-d.pdf) (7 pp, sha256 `205715a3f6329282`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/mc74hc08adtr2g-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "mc74hc08adtr2g",+  "version": "0.1.0",+  "type": "component",+  "description": "onsemi Gates, TSSOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "mc74hc08adtr2g"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "mc74hc08adtr2g.kicad_sym",+    "mc74hc08adtr2g.kicad_mod",+    "mc74hc08adtr2g.glb",+    "mc74hc08adtr2g.step",+    "mc74hc08adtr2g.lbr",+    "docs/hero.png",+    "docs/mc74hc08adtr2g-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file