MC74ACT125DR2G

@@ -0,0 +1,55 @@+# MC74ACT125DR2G++**onsemi** · Buffer/Driver/Transceiver · SOIC-14++MC74ACT125DR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | ~A0 | input | Active-low output enable for buffer 0. When low the buffer drives O0 with B0; when high O0 is placed in the high-impedance (3-state) state. TTL-compatible input threshold (VIH >= 2.0 V, VIL <= 0.8 V) with input leakage +/-1 uA max. |+| 2 | B0 | input | Data input for buffer 0. Drives O0 when the corresponding output enable ~A0 is low; ignored (X) when ~A0 is high (output high-Z). TTL-compatible input threshold on the 'ACT variant. |+| 3 | O0 | tri_state | 3-state buffered output for channel 0. Follows B0 when ~A0 is low; high-Z when ~A0 is high. Drive capability +/-24 mA at VCC = 4.5 V (IOH/IOL guaranteed limits). |+| 4 | ~A1 | input | Active-low output enable for buffer 1. Low = enable (O1 = B1); high = high-Z output. |+| 5 | B1 | input | Data input for buffer 1. Passed to O1 when ~A1 is low. |+| 6 | O1 | tri_state | 3-state buffered output for channel 1. Drives +/-24 mA; high-Z when ~A1 is high. |+| 7 | GND | power_in | Ground reference (0 V) for the device. All input/output voltages are referenced to this pin. |+| 8 | O3 | tri_state | 3-state buffered output for channel 3. Follows B3 when ~A3 is low; high-Z when ~A3 is high. |+| 9 | B3 | input | Data input for buffer 3. Passed to O3 when ~A3 is low. |+| 10 | ~A3 | input | Active-low output enable for buffer 3. Low = enable (O3 = B3); high = high-Z output. |+| 11 | O2 | tri_state | 3-state buffered output for channel 2. Follows B2 when ~A2 is low; high-Z when ~A2 is high. |+| 12 | B2 | input | Data input for buffer 2. Passed to O2 when ~A2 is low. |+| 13 | ~A2 | input | Active-low output enable for buffer 2. Low = enable (O2 = B2); high = high-Z output. |+| 14 | VCC | power_in | Positive supply. Recommended 4.5-5.5 V for the 'ACT variant (absolute max 7.0 V). Bypass with a 0.1 uF ceramic near the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOIC-14 |+| Category | Logic |+| Pins | 14 |++## Ordering variants++- `MC74ACT125DR2GDR2G`+- `MC74ACT125DR2GDG`+- `MC74ACT125DR2GDTR2G`++## CAD (KiCad official)++- Symbol: `MC74ACT125DR2G`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOIC-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mc74act125-d.pdf) (8 pp, sha256 `a8b1cd5809fcaf46`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/mc74act125dr2g-datasheet.pdf)

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