component
MC33063ADG
Public Made by Adomby adom
onsemi New Arrivals, SOIC-8-150mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+79@@ -0,0 +1,79 @@+# MC33063ADG++**onsemi** · New Arrivals · SOIC-8-150mil++MC33063ADG from onsemi, in a SOIC-8-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | Switch Collector | passive | Collector of the internal output switch transistor, rated 40 V maximum (VC(switch)) with switch current up to 1.5 A. |+| 2 | Switch Emitter | passive | Emitter of the internal output switch transistor, rated 40 V maximum (VE(switch)) with switch current up to 1.5 A. |+| 3 | Timing Capacitor | passive | Connection for the external timing capacitor CT that sets the oscillator frequency (33 kHz typ with CT = 1.0 nF). |+| 4 | GND | power_in | Ground. |+| 5 | Comparator Inverting Input | input | Inverting input of the comparator, compared with the 1.25 V reference threshold (input range -0.3 to +40 V) via the output-voltage divider. |+| 6 | VCC | power_in | Supply voltage input, operating from 3.0 V to 40 V. |+| 7 | Ipk Sense | input | Peak current sense input; the current limit trips at about 300 mV across the sense resistor Rsc between VCC and this pin. |+| 8 | Driver Collector | passive | Collector of the internal driver transistor, rated 40 V maximum with driver collector current up to 100 mA. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOIC-8-150mil |+| Category | Others |+| Pins | 8 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| Oscillator Frequency | fosc | 24 | 33 | 42 | kHz | VPin 5 = 0 V, CT = 1.0 nF, TA = 25°C | 3 |+| Charge Current | Ichg | 24 | 35 | 42 | µA | VCC = 5.0 V to 40 V, TA = 25°C | 3 |+| Discharge Current | Idischg | 140 | 220 | 260 | µA | VCC = 5.0 V to 40 V, TA = 25°C | 3 |+| Discharge to Charge Current Ratio | Idischg/Ichg | 5.2 | 6.5 | 7.5 | - | Pin 7 to VCC, TA = 25°C | 3 |+| Current Limit Sense Voltage | Vipk(sense) | 250 | 300 | 350 | mV | Ichg = Idischg, TA = 25°C | 3 |+| Saturation Voltage, Darlington Connection | VCE(sat) | | 1 | 1.3 | V | ISW = 1.0 A, Pins 1, 8 connected | 3 |+| Saturation Voltage, forced beta 20 | VCE(sat) | | 0.45 | 0.7 | V | ISW = 1.0 A, RPin 8 = 82 Ω to VCC, Forced β ≥ 20 | 3 |+| DC Current Gain | hFE | 50 | 75 | | - | ISW = 1.0 A, VCE = 5.0 V, TA = 25°C | 3 |+| Collector Off-State Current | IC(off) | | 0.01 | 100 | µA | VCE = 40 V | 3 |+| Comparator Threshold Voltage (25°C) | Vth | 1.225 | 1.25 | 1.275 | V | TA = 25°C | 3 |+| Comparator Threshold Voltage (Tlow to Thigh) | Vth | 1.21 | | 1.29 | V | TA = Tlow to Thigh | 3 |+| Threshold Voltage Line Regulation | Regline | | 1.4 | 5 | mV | VCC = 3.0 V to 40 V, MC33063 | 3 |+| Input Bias Current | IIB | | -20 | -400 | nA | Vin = 0 V | 3 |+| Supply Current | ICC | | | 4 | mA | VCC = 5.0 V to 40 V, CT = 1.0 nF, Pin 7 = VCC, VPin 5 > Vth, Pin 2 = GND, remaining pins open | 3 |+| Power Supply Voltage | VCC | | | 40 | Vdc | | 2 |+| Comparator Input Voltage Range | VIR | -0.3 | | 40 | Vdc | | 2 |+| Switch Collector Voltage | VC(switch) | | | 40 | Vdc | | 2 |+| Switch Emitter Voltage | VE(switch) | | | 40 | Vdc | VPin 1 = 40 V | 2 |+| Switch Collector to Emitter Voltage | VCE(switch) | | | 40 | Vdc | | 2 |+| Driver Collector Voltage | VC(driver) | | | 40 | Vdc | | 2 |+| Driver Collector Current | IC(driver) | | | 100 | mA | Note 1 | 2 |+| Switch Current | ISW | | | 1.5 | A | | 2 |+| Power Dissipation, SOIC | PD | | | 625 | mW | SOIC Package, D Suffix, TA = 25°C | 2 |+| Operating Junction Temperature | TJ | | | 150 | °C | | 2 |+| Operating Ambient Temperature Range | TA | -40 | | 85 | °C | MC33063A | 2 |+| Storage Temperature Range | Tstg | -65 | | 150 | °C | | 2 |+| Thermal Resistance, Junction to Ambient | RθJA | | | 160 | °C/W | SOIC Package, D Suffix | 2 |+| Thermal Resistance, Junction to Case | RθJC | | | 45 | °C/W | SOIC Package, D Suffix | 2 |++## CAD (KiCad official)++- Symbol: `MC33063ADG`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8-150mil (KiCad packages3D, STEP)+- 3D model files: `mc33063adg-etched.step` / `mc33063adg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mc33063adg.step` / `mc33063adg.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mc33063a-d.pdf) (16 pp, sha256 `aeeba105b8030b72`, retrieved 2026-10-23, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/mc33063adg-datasheet.pdf)
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