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mc14081bdr2g: factory component page (tier=mfr)

Ray ·39d67abe32 · ·parent b4400d2
1 file changed +152−8
page.json+152−8
@@ -1,13 +1,162 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "mc14081bdr2g",+  "title": "MC14081BDR2G",+  "brief": "onsemi Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "onsemi Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",     "mc14081bdr2g"   ],+  "component": {+    "mpn": "MC14081BDR2G",+    "manufacturer": "onsemi",+    "package": "SOIC-14",+    "pin_count": 14,+    "category": "Logic",+    "subcategory": "Gates",+    "datasheet": "https://www.onsemi.com/pdf/datasheet/mc14081b-d.pdf",+    "parts": {+      "symbol": "mc14081bdr2g.kicad_sym",+      "footprint": "mc14081bdr2g.kicad_mod",+      "model_3d": "mc14081bdr2g.glb",+      "model_3d_step": "mc14081bdr2g.step",+      "lbr": "mc14081bdr2g.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "IN1A",+        "type": "input",+        "description": "Gate A input 1. CMOS logic input, VIL max 1.5 V @ VDD=5 V, VIH min 3.5 V @ VDD=5 V. Unused inputs of AND gates must be tied to VDD."+      },+      {+        "number": "2",+        "name": "IN2A",+        "type": "input",+        "description": "Gate A input 2. CMOS logic input paired with IN1A to produce OUTA = IN1A AND IN2A."+      },+      {+        "number": "3",+        "name": "OUTA",+        "type": "output",+        "description": "Gate A buffered output. OUTA = IN1A AND IN2A. Capable of driving two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range."+      },+      {+        "number": "4",+        "name": "OUTB",+        "type": "output",+        "description": "Gate B buffered output. OUTB = IN1B AND IN2B."+      },+      {+        "number": "5",+        "name": "IN1B",+        "type": "input",+        "description": "Gate B input 1. CMOS logic input, paired with IN2B."+      },+      {+        "number": "6",+        "name": "IN2B",+        "type": "input",+        "description": "Gate B input 2. CMOS logic input, paired with IN1B."+      },+      {+        "number": "7",+        "name": "VSS",+        "type": "power_in",+        "description": "Negative supply / ground reference for the package. All voltages in the datasheet are referenced to VSS. Typically tied to 0 V."+      },+      {+        "number": "8",+        "name": "IN1C",+        "type": "input",+        "description": "Gate C input 1. CMOS logic input, paired with IN2C."+      },+      {+        "number": "9",+        "name": "IN2C",+        "type": "input",+        "description": "Gate C input 2. CMOS logic input, paired with IN1C."+      },+      {+        "number": "10",+        "name": "OUTC",+        "type": "output",+        "description": "Gate C buffered output. OUTC = IN1C AND IN2C."+      },+      {+        "number": "11",+        "name": "OUTD",+        "type": "output",+        "description": "Gate D buffered output. OUTD = IN1D AND IN2D."+      },+      {+        "number": "12",+        "name": "IN1D",+        "type": "input",+        "description": "Gate D input 1. CMOS logic input, paired with IN2D."+      },+      {+        "number": "13",+        "name": "IN2D",+        "type": "input",+        "description": "Gate D input 2. CMOS logic input, paired with IN1D."+      },+      {+        "number": "14",+        "name": "VDD",+        "type": "power_in",+        "description": "Positive supply voltage. Operating range 3.0 V to 18 V (absolute max -0.5 V to +18 V referenced to VSS). Bypass with a local decoupling capacitor to VSS."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.onsemi.com/pdf/datasheet/mc14081b-d.pdf",+        "pages": 11,+        "sha256": "9ca14896296eb906",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "onsemi",+      "Package": "SOIC-14",+      "Category": "Logic",+      "Pins": "14"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "mc14081bdr2g"+  ],+  "discovery_pitch": "MC14081BDR2G (onsemi) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +174,5 @@     "docs/mc14081bdr2g-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file