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Initial commit: component/mc14049bdr2g

Ray ·da89c674e6 ·1mo ago
2 files changed +94
README.mdadded+60
@@ -0,0 +1,60 @@+# MC14049BDR2G++**onsemi** · Inverters · SOIC-16++MC14049BDR2G from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDD | power_in | Positive supply rail. Operating range 3.0 V to 18 V referenced to VSS. All six inverters share this rail. |+| 2 | OUTA | output | Inverter A output. CMOS push-pull; swings VSS to VDD. Sinks 3.2 mA at VOL=0.4 V with VDD=5 V (drives up to 2 TTL loads). |+| 3 | INA | input | Inverter A input. Vin may exceed VDD (up to +18 V absolute), enabling high-to-low level translation. VIH ≥ 3.5 V and VIL ≤ 1.5 V at VDD=5 V. |+| 4 | OUTB | output | Inverter B output. CMOS push-pull; logical inversion of INB. |+| 5 | INB | input | Inverter B input. Vin may exceed VDD for level shifting; high impedance CMOS gate input. |+| 6 | OUTC | output | Inverter C output. CMOS push-pull; logical inversion of INC. |+| 7 | INC | input | Inverter C input. Vin may exceed VDD for level shifting; high impedance CMOS gate input. |+| 8 | VSS | power_in | Ground / negative supply reference. All voltages in the datasheet are referenced to VSS. |+| 9 | IND | input | Inverter D input. Vin may exceed VDD for level shifting; high impedance CMOS gate input. |+| 10 | OUTD | output | Inverter D output. CMOS push-pull; logical inversion of IND. |+| 11 | INE | input | Inverter E input. Vin may exceed VDD for level shifting; high impedance CMOS gate input. |+| 12 | OUTE | output | Inverter E output. CMOS push-pull; logical inversion of INE. |+| 13 | NC | unconnected | Not connected internally. Datasheet states pins 13 and 16 have no internal connection; leaving them floating or tying them to any level does not affect operation. |+| 14 | INF | input | Inverter F input. Vin may exceed VDD for level shifting; high impedance CMOS gate input. |+| 15 | OUTF | output | Inverter F output. CMOS push-pull; logical inversion of INF. |+| 16 | NC | unconnected | Not connected internally. Datasheet explicitly notes pins 13 and 16 are not connected inside the die. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOIC-16 |+| Category | Logic |+| Pins | 16 |++## Ordering variants++- `MC14049BDR2GDG`+- `MC14049BDR2GDR2G`+- `MC14049BDR2GNLV...DR2G`+- `MC14049BDR2GFELG`+- `MC14049BDR2GDTG (14050B only)`+- `MC14049BDR2GDTR2G (14050B only)`++## CAD (KiCad official)++- Symbol: `MC14049BDR2G`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/mc14049b-d.pdf) (8 pp, sha256 `be5409591844c2e9`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/mc14049bdr2g-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "mc14049bdr2g",+  "version": "0.1.0",+  "type": "component",+  "description": "onsemi Inverters, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "mc14049bdr2g"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "mc14049bdr2g.kicad_sym",+    "mc14049bdr2g.kicad_mod",+    "mc14049bdr2g.glb",+    "mc14049bdr2g.step",+    "mc14049bdr2g.lbr",+    "docs/hero.png",+    "docs/mc14049bdr2g-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file