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mc14013bdtr2g: factory component page (tier=mfr)

Ray ·4de41e3e1a ·2mo ago ·parent 666e639
1 file changed +152−8
page.json+152−8
@@ -1,13 +1,162 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "mc14013bdtr2g",+  "title": "MC14013BDTR2G",+  "brief": "onsemi Flip Flops, TSSOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "onsemi Flip Flops, TSSOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",     "mc14013bdtr2g"   ],+  "component": {+    "mpn": "MC14013BDTR2G",+    "manufacturer": "onsemi",+    "package": "TSSOP-14",+    "pin_count": 14,+    "category": "Logic",+    "subcategory": "Flip Flops",+    "datasheet": "https://www.onsemi.com/pdf/datasheet/mc14013bdtr2-d.pdf",+    "parts": {+      "symbol": "mc14013bdtr2g.kicad_sym",+      "footprint": "mc14013bdtr2g.kicad_mod",+      "model_3d": "mc14013bdtr2g.glb",+      "model_3d_step": "mc14013bdtr2g.step",+      "lbr": "mc14013bdtr2g.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "QA",+        "type": "output",+        "description": "Flip-flop A true output (Q). CMOS push-pull output; drives two low-power TTL loads or one LS-TTL load over rated temperature range."+      },+      {+        "number": "2",+        "name": "QA_N",+        "type": "output",+        "description": "Flip-flop A complementary output (Q-bar). CMOS push-pull output; always the logical inverse of QA except in the Set=Reset=1 override condition."+      },+      {+        "number": "3",+        "name": "CA",+        "type": "input",+        "description": "Flip-flop A Clock input. Data is transferred from D to Q on the positive-going edge of the clock pulse. CMOS input with diode protection."+      },+      {+        "number": "4",+        "name": "RA",+        "type": "input",+        "description": "Flip-flop A Direct Reset input (active high, asynchronous). When high, forces QA=0 and QA_N=1 independent of clock and data."+      },+      {+        "number": "5",+        "name": "DA",+        "type": "input",+        "description": "Flip-flop A Data input. Sampled on the positive-going edge of CA and transferred to QA. Setup/hold times of ~40 ns at VDD=5 V."+      },+      {+        "number": "6",+        "name": "SA",+        "type": "input",+        "description": "Flip-flop A Direct Set input (active high, asynchronous). When high, forces QA=1 and QA_N=0 independent of clock and data."+      },+      {+        "number": "7",+        "name": "VSS",+        "type": "power_in",+        "description": "Negative supply / ground reference. All input and output voltages are referenced to VSS. Typically tied to 0 V."+      },+      {+        "number": "8",+        "name": "SB",+        "type": "input",+        "description": "Flip-flop B Direct Set input (active high, asynchronous). When high, forces QB=1 and QB_N=0 independent of clock and data."+      },+      {+        "number": "9",+        "name": "DB",+        "type": "input",+        "description": "Flip-flop B Data input. Sampled on the positive-going edge of CB and transferred to QB."+      },+      {+        "number": "10",+        "name": "RB",+        "type": "input",+        "description": "Flip-flop B Direct Reset input (active high, asynchronous). When high, forces QB=0 and QB_N=1 independent of clock and data."+      },+      {+        "number": "11",+        "name": "CB",+        "type": "input",+        "description": "Flip-flop B Clock input. Data is transferred from D to Q on the positive-going edge of the clock pulse."+      },+      {+        "number": "12",+        "name": "QB_N",+        "type": "output",+        "description": "Flip-flop B complementary output (Q-bar). CMOS push-pull output; logical inverse of QB except in the Set=Reset=1 override condition."+      },+      {+        "number": "13",+        "name": "QB",+        "type": "output",+        "description": "Flip-flop B true output (Q). CMOS push-pull output; drives two low-power TTL loads or one LS-TTL load over rated temperature range."+      },+      {+        "number": "14",+        "name": "VDD",+        "type": "power_in",+        "description": "Positive supply voltage. Rated range 3.0 to 18 Vdc (absolute max 18 V). Bypass with a ceramic capacitor to VSS close to the pin."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.onsemi.com/pdf/datasheet/mc14013bdtr2-d.pdf",+        "pages": 8,+        "sha256": "d026165b363be4d9",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "onsemi",+      "Package": "TSSOP-14",+      "Category": "Logic",+      "Pins": "14"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "mc14013bdtr2g"+  ],+  "discovery_pitch": "MC14013BDTR2G (onsemi) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +174,5 @@     "docs/mc14013bdtr2g-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file