component
MAL214066221E3
Public Made by Adomby adom
Vishay Intertech Aluminum Electrolytic Capacitors - Leaded, CP_Radial_D10.0mm_P5.00mm. Polarised capacitor: pin 1 is + by the KiCad polarised-footprint convention, KiCad symbol/footprint/3D.
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Publish 0.1.1
7 files changed
+142−67
README.md+9−24@@ -8,8 +8,8 @@ MAL214066221E3 from Vishay Intertech, in a CP_Radial_D10.0mm_P5.00mm. Pinout and | Pin | Name | Type | Function | |---|---|---|---|-| 1 | 1 | passive | Terminal 1 of an unpolarised capacitor; either orientation. |-| 2 | 2 | passive | Terminal 2 of an unpolarised capacitor; either orientation. |+| 1 | + | passive | Positive terminal; pad 1 of the KiCad polarised-capacitor footprint (CP_, pad 1 = +). |+| 2 | - | passive | Negative terminal. | ## Key specifications @@ -26,31 +26,16 @@ Limits as printed in the datasheet (page.json `metadata.characteristics` carries | Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page | |---|---|---|---|---|---|---|---|-| Tolerance on rated capacitance CR | | -20 | | 20 | % | | 1 |-| Max. leakage current after 1 min at UR (IL1) | IL1 | | | 58 | µA | after 1 min at UR | 3 |+| Tolerance on rated capacitance | CR | -20 | | 20 | % | | 1 | | Max. dissipation factor | tan δ | | | 0.14 | | 100 Hz | 3 | | Max. impedance | Z | | | 0.15 | Ω | 100 kHz, +20 °C | 3 | | Max. impedance | Z | | | 1.1 | Ω | 100 kHz, -40 °C | 3 |-| Endurance test capacitance change | C/C | -15 | | 15 | % | Tamb = 125 °C; UR applied; 2000 h | 6 |-| Endurance test dissipation factor limit | tan δ | | | 1.3 | x spec. limit | Tamb = 125 °C; UR applied; 2000 h | 6 |-| Endurance test impedance limit | Z | | | 2 | x spec. limit | Tamb = 125 °C; UR applied; 2000 h | 6 |-| Useful life capacitance change | C/C | -30 | | 30 | % | Tamb = 125 °C; UR and IR applied; per Table 3 duration | 6 |-| Useful life dissipation factor limit | tan δ | | | 3 | x spec. limit | Tamb = 125 °C; UR and IR applied | 6 |-| Useful life impedance limit | Z | | | 3 | x spec. limit | Tamb = 125 °C; UR and IR applied | 6 |-| Shelf life capacitance change | C/C | -15 | | 15 | % | Tamb = 125 °C; no voltage applied; 500 h | 6 |-| Shelf life dissipation factor limit | tan δ | | | 1.3 | x spec. limit | Tamb = 125 °C; no voltage applied; 500 h | 6 |-| Shelf life impedance limit | Z | | | 2 | x spec. limit | Tamb = 125 °C; no voltage applied; 500 h | 6 |-| Shelf life leakage current limit | IL5 | | | 2 | x spec. limit | Tamb = 125 °C; no voltage applied; 500 h | 6 |-| Surge voltage | Us | | | 1.15 | x UR | | 4 |+| Max. leakage current | IL1 | | | 58 | μA | 1 min at UR | 3 |+| Rated RMS ripple current | IR | | | 750 | mA | 100 kHz, 125 °C | 3 |+| Rated voltage | UR | | | 25 | V | | 3 | | Reverse voltage | Urev | | | 1 | V | | 4 | | Category temperature range | | -55 | | 125 | °C | | 1 |-| Rated voltage | UR | | 25 | | V | | 3 |-| Rated capacitance | CR | | 220 | | µF | at 100 Hz | 3 |-| Rated RMS ripple current (IR) | IR | | 750 | | mA | 100 kHz, 125 °C | 3 |-| Equivalent series inductance (ESL) | ESL | | 16 | | nH | case Ø D = 10 mm | 4 |-| Endurance test duration at 125 °C | | | 2000 | | h | case 10 x 16 mm | 5 |-| Useful life at 125 °C | | | 3000 | | h | case 10 x 16 mm; IR applied | 5 |-| Shelf life at 0 V, 125 °C | | | 500 | | h | Tamb = 125 °C; no voltage applied | 6 |+| Rated capacitance | CR | | 220 | | μF | 100 Hz | 3 | ## CAD (KiCad official) @@ -63,8 +48,8 @@ Limits as printed in the datasheet (page.json `metadata.characteristics` carries Data extracted from the manufacturer datasheet, not a distributor listing: -- **Datasheet:** [Vishay Intertech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590149397414502400) (7 pp, sha256 `a81c9710d31a808c`, retrieved 2026-11-07, tier: lcsc)-- **Extractor:** parts-factory `2.0.0` / `extract_pins`, primary `two-terminal convention` (convention), consensus `off` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **Datasheet:** [Vishay Intertech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590149397414502400) (7 pp, sha256 `a81c9710d31a808c`, retrieved 2026-11-11, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins`, primary `polarised-capacitor convention` (convention), consensus `off` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - **CAD:** KiCad official libraries (CC-BY-SA 4.0). [Datasheet PDF](docs/mal214066221e3-datasheet.pdf)
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mal214066221e3-hero.overlay.json+16−8@@ -30,7 +30,15 @@ 0.3 ], "footprint_items": 193,- "pin1": null+ "pin1": {+ "source": "added dot (AI)",+ "pad": "1",+ "center_mm": [+ -1.55,+ 0.0+ ],+ "r_mm": 0.35+ } }, "signal_names": { "material": "Signal names - 50 percent opacity",@@ -43,7 +51,7 @@ "font": "DejaVu Sans Mono", "labels": 2, "sides": "top + mirrored underside (single-sided)",- "fallback_to_pad_number": 2+ "fallback_to_pad_number": 0 } }, "align": {@@ -71,14 +79,14 @@ "footprint": "mal214066221e3.kicad_mod", "footprint_sha256": "9d9997d54ed746a52e212af51c3c6a4e3e3e7eba9696d8b5cf606ca29ff429b0", "pins": "page.json component.pins",- "pins_sha256": "f89b6cef1dd40bf094bc57ef23dc246a408922a81bfac75b8bc341584ea4e214"+ "pins_sha256": "4cf40a1456a7d19b417e474eac68c758a3607c3c4ac5878b9f23c0eff3c13a99" },- "generator": "adom-wiki 1.8.14 (component_hero)",+ "generator": "adom-wiki 1.8.19 (component_hero)", "labels": [ { "pad": "1",- "text": "1",- "x": -1.15,+ "text": "+",+ "x": -2.05, "y": 0.0, "align": "right", "vertical": false,@@ -86,8 +94,8 @@ }, { "pad": "2",- "text": "2",- "x": 6.15,+ "text": "-",+ "x": 7.59, "y": 0.0, "align": "left", "vertical": false,
mal214066221e3.lbr+3−3@@ -50,7 +50,7 @@ <layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> </layers> <library>-<description>Vishay Intertech Aluminum Electrolytic Capacitors - Leaded, 插件. Unpolarised two-terminal part: the datasheet prints no pin numbers, so pins 1 and 2 follow the library convention</description>+<description>Vishay Intertech Aluminum Electrolytic Capacitors - Leaded, CP_Radial_D10.0mm_P5.00mm. Polarised capacitor: pin 1 is + by the KiCad polarised-footprint convention</description> <packages> <package name="CP_Radial_D10.0mm_P5.00mm"> <description>CP, 5.00 mm pitch. CP, Radial series, Radial, pin pitch=5.00mm, diameter=10mm, height=16mm, Electrolytic Capacitor</description>@@ -258,7 +258,7 @@ </packages> <symbols> <symbol name="MAL214066221E3">- <description>Vishay Intertech Aluminum Electrolytic Capacitors - Leaded, 插件. Unpolarised two-terminal part: the datasheet prints no pin numbers, so pins 1 and 2 follow the library convention</description>+ <description>Vishay Intertech Aluminum Electrolytic Capacitors - Leaded, CP_Radial_D10.0mm_P5.00mm. Polarised capacitor: pin 1 is + by the KiCad polarised-footprint convention</description> <wire x1="-2.286" y1="0.508" x2="2.286" y2="0.508" width="0.254" layer="94"/> <wire x1="2.286" y1="0.508" x2="2.286" y2="1.016" width="0.254" layer="94"/> <wire x1="2.286" y1="1.016" x2="-2.286" y2="1.016" width="0.254" layer="94"/>@@ -276,7 +276,7 @@ </symbols> <devicesets> <deviceset name="MAL214066221E3" prefix="C">- <description>Vishay Intertech Aluminum Electrolytic Capacitors - Leaded, 插件. Unpolarised two-terminal part: the datasheet prints no pin numbers, so pins 1 and 2 follow the library convention</description>+ <description>Vishay Intertech Aluminum Electrolytic Capacitors - Leaded, CP_Radial_D10.0mm_P5.00mm. Polarised capacitor: pin 1 is + by the KiCad polarised-footprint convention</description> <gates> <gate name="G$1" symbol="MAL214066221E3" x="0" y="0"/> </gates>
package.json+56−16@@ -1,8 +1,8 @@ { "slug": "mal214066221e3",- "version": "0.1.0",+ "version": "0.1.1", "type": "component",- "description": "Vishay Intertech Aluminum Electrolytic Capacitors - Leaded, 插件. Unpolarised two-terminal part: the datasheet prints no pin numbers, so pins 1 and 2 follow the library convention, KiCad symbol/footprint/3D.",+ "description": "Vishay Intertech Aluminum Electrolytic Capacitors - Leaded, CP_Radial_D10.0mm_P5.00mm. Polarised capacitor: pin 1 is + by the KiCad polarised-footprint convention, KiCad symbol/footprint/3D.", "tags": [ "component", "capacitors",@@ -54,12 +54,11 @@ "mouser": "594-2222-140-66221" }, "distributor_check": {- "checked_at": "2026-11-07T02:43:42Z",+ "checked_at": "2026-11-11T18:51:43Z", "source": "Component Ocean /api/assign-pns", "digikey": { "pn": "MAL214066221E3-ND",- "status": "found",- "lifecycle": "Active"+ "status": "found" }, "mouser": { "pn": "594-2222-140-66221",@@ -69,15 +68,15 @@ "pins": [ { "number": "1",- "name": "1",+ "name": "+", "type": "passive",- "description": "Terminal 1 of an unpolarised capacitor; either orientation."+ "description": "Positive terminal; pad 1 of the KiCad polarised-capacitor footprint (CP_, pad 1 = +)." }, { "number": "2",- "name": "2",+ "name": "-", "type": "passive",- "description": "Terminal 2 of an unpolarised capacitor; either orientation."+ "description": "Negative terminal." } ], "provenance": {@@ -85,7 +84,7 @@ "factory_chain": { "factory": "2.0.0", "extractor": "extract_pins",- "primary_model": "two-terminal convention",+ "primary_model": "polarised-capacitor convention", "primary_mode": "convention", "consensus_model": null, "consensus": "agreed",@@ -94,8 +93,8 @@ "vision extraction: provenance cannot be text-verified; needs consensus" ], "pages_sent": 7,- "cost_usd": 0.0025,- "at": "2026-11-07T02:43:32"+ "cost_usd": 0.0026,+ "at": "2026-11-11T18:51:32" }, "datasheet": { "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590149397414502400",@@ -132,7 +131,7 @@ "centre_offset_mm": 0.0, "footprint_binding": "identity", "sha256": "7367f35dd5439e325ba3912de65e9200831fdc6698080ffd056cd268649ba41d",- "checked": "2026-11-07",+ "checked": "2026-11-11", "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)" }, {@@ -150,10 +149,51 @@ "zmin_mm": -2.0, "centre_offset_mm": 0.0, "footprint_binding": "identity",- "sha256": "5a6e6010f751e47647cf3c17f96306015eff4c2ecf06eed0a4f93083b33d8b39",- "checked": "2026-11-07",+ "sha256": "35f0e19bf06123162364bf501e513ad72ee09d30329f31fc634052278f853eff",+ "checked": "2026-11-11", "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)" }- ]+ ],+ "package_dims": {+ "package_code": "Case code 15 (Ø10 x 16 mm), Form CB (cut leads)",+ "source_page": 2,+ "D": {+ "nom_mm": 10.5,+ "range_mm": [+ null,+ 10.5+ ]+ },+ "E1": {+ "nom_mm": 10.5,+ "range_mm": [+ null,+ 10.5+ ]+ },+ "e": {+ "nom_mm": 5.0,+ "range_mm": [+ 4.5,+ 5.5+ ]+ },+ "A": {+ "nom_mm": 17.5,+ "range_mm": [+ null,+ 17.5+ ]+ },+ "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",+ "model_check": {+ "file": "mal214066221e3.step",+ "verdict": "PASS",+ "reasons": [+ "height within the datasheet's package drawing"+ ],+ "by": "factory/package_fit.py"+ }+ } } }
page.json+58−16@@ -4,7 +4,7 @@ "slug": "mal214066221e3", "title": "MAL214066221E3", "brief": "Vishay Intertech Aluminum Electrolytic Capacitors - Leaded, 插件. Unpolarised two-terminal part: the datasheet prints no pin numbers, so pins 1 and 2 follow the library convention, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.1.1", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -36,12 +36,11 @@ "mouser": "594-2222-140-66221" }, "distributor_check": {- "checked_at": "2026-11-07T02:43:42Z",+ "checked_at": "2026-11-11T18:51:43Z", "source": "Component Ocean /api/assign-pns", "digikey": { "pn": "MAL214066221E3-ND",- "status": "found",- "lifecycle": "Active"+ "status": "found" }, "mouser": { "pn": "594-2222-140-66221",@@ -51,15 +50,15 @@ "pins": [ { "number": "1",- "name": "1",+ "name": "+", "type": "passive",- "description": "Terminal 1 of an unpolarised capacitor; either orientation."+ "description": "Positive terminal; pad 1 of the KiCad polarised-capacitor footprint (CP_, pad 1 = +)." }, { "number": "2",- "name": "2",+ "name": "-", "type": "passive",- "description": "Terminal 2 of an unpolarised capacitor; either orientation."+ "description": "Negative terminal." } ], "provenance": {@@ -67,7 +66,7 @@ "factory_chain": { "factory": "2.0.0", "extractor": "extract_pins",- "primary_model": "two-terminal convention",+ "primary_model": "polarised-capacitor convention", "primary_mode": "convention", "consensus_model": null, "consensus": "agreed",@@ -76,8 +75,8 @@ "vision extraction: provenance cannot be text-verified; needs consensus" ], "pages_sent": 7,- "cost_usd": 0.0025,- "at": "2026-11-07T02:43:32"+ "cost_usd": 0.0026,+ "at": "2026-11-11T18:51:32" }, "datasheet": { "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590149397414502400",@@ -114,7 +113,7 @@ "centre_offset_mm": 0, "footprint_binding": "identity", "sha256": "7367f35dd5439e325ba3912de65e9200831fdc6698080ffd056cd268649ba41d",- "checked": "2026-11-07",+ "checked": "2026-11-11", "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)" }, {@@ -132,11 +131,52 @@ "zmin_mm": -2, "centre_offset_mm": 0, "footprint_binding": "identity",- "sha256": "5a6e6010f751e47647cf3c17f96306015eff4c2ecf06eed0a4f93083b33d8b39",- "checked": "2026-11-07",+ "sha256": "35f0e19bf06123162364bf501e513ad72ee09d30329f31fc634052278f853eff",+ "checked": "2026-11-11", "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)" }- ]+ ],+ "package_dims": {+ "package_code": "Case code 15 (Ø10 x 16 mm), Form CB (cut leads)",+ "source_page": 2,+ "D": {+ "nom_mm": 10.5,+ "range_mm": [+ null,+ 10.5+ ]+ },+ "E1": {+ "nom_mm": 10.5,+ "range_mm": [+ null,+ 10.5+ ]+ },+ "e": {+ "nom_mm": 5,+ "range_mm": [+ 4.5,+ 5.5+ ]+ },+ "A": {+ "nom_mm": 17.5,+ "range_mm": [+ null,+ 17.5+ ]+ },+ "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",+ "model_check": {+ "file": "mal214066221e3.step",+ "verdict": "PASS",+ "reasons": [+ "height within the datasheet's package drawing"+ ],+ "by": "factory/package_fit.py"+ }+ } }, "metadata": { "specs": {@@ -492,5 +532,7 @@ ], "visibility": { "public": true- }+ },+ "description": "Vishay Intertech Aluminum Electrolytic Capacitors - Leaded, CP_Radial_D10.0mm_P5.00mm. Polarised capacitor: pin 1 is + by the KiCad polarised-footprint convention, KiCad symbol/footprint/3D.",+ "org": "adom" }