M93C56-WMN6TP

@@ -0,0 +1,54 @@+# M93C56-WMN6TP++**STMicroelectronics** · EEPROM · SOIC-8++M93C56-WMN6TP from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | S | input | Chip Select input. Active high; enables the MICROWIRE serial interface. Must be pulled low (to VSS) during power-up/power-down and while deselected. |+| 2 | C | input | Serial Clock input (MICROWIRE clock, up to 2 MHz). Latches data on D on rising edge; shifts data out on Q on rising edge. Should be held low via an external pull-down when the bus master's outputs go high impedance. |+| 3 | D | input | Serial Data Input. Instructions, addresses, and write data are shifted in on this pin, synchronous with the rising edge of C. |+| 4 | Q | tri_state | Serial Data Output. Read data is shifted out on this pin synchronous with the rising edge of C. High-impedance when the device is not selected or during internal write cycle; also carries the READY/BUSY status while S is high after a program command. |+| 5 | VSS | power_in | Ground reference (0 V) for the device. |+| 6 | ORG | input | Organization Select input. Tie to VCC (or leave unconnected) for x16 (word) organization; tie to VSS for x8 (byte) organization. To minimize standby current, ORG should be driven to VCC or VSS and not left floating in standby. |+| 7 | DU | unconnected | Don't Use. Reserved by STMicroelectronics for internal test. May be left unconnected or tied to VCC or VSS; does not affect normal device operation. |+| 8 | VCC | power_in | Supply voltage input. 2.5 V to 5.5 V for M93Cx6-W variants (1.8 V to 5.5 V for -R variants). Decouple with 10 nF to 100 nF close to the VCC/VSS pins. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SOIC-8 |+| Category | Memory |+| Pins | 8 |++## Ordering variants++Same part, different packaging or reel option.++- `M93C56-WMN6TP`+- `M93C56-WMN6TPMN6P`+- `M93C56-WMN6TPBN6`+- `M93C56-WMN6TPBN6TP`+- `M93C56-WMN6TPDW6TP`+- `M93C56-WMN6TPMC6TP`++## CAD (KiCad official)++- Symbol: `M93C56-WMN6TP`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/m93c56-wmn6tp.pdf) (35 pp, sha256 `7b1f76e6c602697a`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/m93c56-wmn6tp-datasheet.pdf)

@@ -0,0 +1,34 @@+{+  "slug": "m93c56-wmn6tp",+  "version": "0.1.0",+  "type": "component",+  "description": "STMicroelectronics EEPROM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "memory",+    "m93c56-wmn6tp"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "m93c56-wmn6tp.kicad_sym",+    "m93c56-wmn6tp.kicad_mod",+    "m93c56-wmn6tp.glb",+    "m93c56-wmn6tp.step",+    "m93c56-wmn6tp.lbr",+    "docs/hero.png",+    "docs/m93c56-wmn6tp-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file