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lt8609aimse-pbf: factory component page (tier=lcsc)

Ray ·91c72ccdd7 ·2mo ago ·parent ac2f674
1 file changed +200−8
page.json+200−8
@@ -1,13 +1,210 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "lt8609aimse-pbf",+  "title": "LT8609AIMSE#PBF",+  "brief": "Analog Devices DC-DC Converters, MSOP-10-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Analog Devices DC-DC Converters, MSOP-10-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "power management (pmic)",     "lt8609aimse#pbf"   ],+  "component": {+    "mpn": "LT8609AIMSE#PBF",+    "manufacturer": "Analog Devices",+    "package": "MSOP-10-EP",+    "pin_count": 11,+    "category": "Power Management (PMIC)",+    "subcategory": "DC-DC Converters",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589836534217682944",+    "parts": {+      "symbol": "lt8609aimse-pbf.kicad_sym",+      "footprint": "lt8609aimse-pbf.kicad_mod",+      "model_3d": "lt8609aimse-pbf.glb",+      "model_3d_step": "lt8609aimse-pbf.step",+      "lbr": "lt8609aimse-pbf.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "BST",+        "type": "passive",+        "description": "Bootstrap capacitor pin providing the drive voltage (above VIN) for the internal top-side power NMOS switch. Place a 0.1\u00b5F ceramic capacitor from BST to SW as close to the IC as possible; do not place a series resistor."+      },+      {+        "number": "2",+        "name": "SW",+        "type": "power_out",+        "description": "Switch node - output of the internal top-side and synchronous bottom-side power MOSFETs. Connect to the external inductor and to the bootstrap capacitor. Keep this node small on the PCB for good EMI/thermal performance."+      },+      {+        "number": "3",+        "name": "INTVCC",+        "type": "power_out",+        "description": "Internal 3.5V LDO regulator bypass pin that supplies the internal gate drivers and control circuits. Voltage varies from 2.8V to 3.5V; max output 20mA. Decouple to GND with at least a 1\u00b5F low-ESR ceramic capacitor. Do not load with external circuitry."+      },+      {+        "number": "4",+        "name": "RT",+        "type": "input",+        "description": "Oscillator frequency-set pin. Tie a resistor from RT to GND to program the switching frequency between 200kHz (RT = 221k\u03a9) and 2.2MHz (RT = 16.2k\u03a9)."+      },+      {+        "number": "5",+        "name": "SYNC",+        "type": "input",+        "description": "External clock synchronization / mode-select input. Tie to GND for low-ripple Burst Mode; drive with an external clock (200kHz-2.2MHz) to synchronize; leave floating for pulse-skipping mode; tie to INTVCC or 3.2V-5.0V for pulse-skipping mode with spread-spectrum modulation."+      },+      {+        "number": "6",+        "name": "FB",+        "type": "input",+        "description": "Feedback input for the adjustable-output LT8609A. Regulated to 0.782V. Connect to the tap of the external VOUT-to-GND resistor divider that programs the output voltage. Add a ~10pF phase-lead capacitor from VOUT to FB when using large divider resistors."+      },+      {+        "number": "7",+        "name": "TR/SS",+        "type": "input",+        "description": "Output tracking and soft-start pin. An internal 2\u00b5A pull-up from INTVCC charges an external capacitor to program the output-voltage slew rate. Below 0.782V the part regulates FB to the TR/SS voltage; above 0.782V tracking is disabled. Pulled to GND through a 300\u03a9 MOSFET in shutdown and fault conditions."+      },+      {+        "number": "8",+        "name": "PG",+        "type": "output",+        "description": "Power-good open-drain output. Held low until FB is within \u00b18.5% of the regulation setpoint and no fault is present. Absolute max 42V; valid when VIN > 3.2V regardless of EN/UV state. Requires an external pull-up resistor."+      },+      {+        "number": "9",+        "name": "VIN",+        "type": "power_in",+        "description": "Main input supply pin, 3.0V to 42V. Supplies internal control circuitry and the internal top-side power switch. Locally bypass with a low-ESR ceramic capacitor placed close to VIN and the exposed-pad GND."+      },+      {+        "number": "10",+        "name": "EN/UV",+        "type": "input",+        "description": "Enable / input under-voltage lockout pin. Rising threshold 1.05V, falling 1.00V. Ground to shut the part down (IQ \u2248 1\u00b5A); tie to VIN if shutdown/UVLO is not used, or use an external VIN divider to program a precise VIN turn-on threshold. Absolute max 42V."+      },+      {+        "number": "11",+        "name": "GND",+        "type": "power_in",+        "description": "Exposed thermal pad - signal and power ground return. Must be soldered directly to the PCB ground plane both for the electrical return path and to achieve the specified \u03b8JA = 40\u00b0C/W thermal resistance."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589836534217682944",+        "pages": 30,+        "sha256": "bb514bf594e97238",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 11,+        "described": 11,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Analog Devices",+      "Package": "MSOP-10-EP",+      "Category": "Power Management (PMIC)",+      "Pins": "11"+    }+  },+  "variants": [+    {+      "mpn": "LT8609AIMSE#PBFEMSE",+      "kind": "packaging"+    },+    {+      "mpn": "LT8609AIMSE#PBF",+      "kind": "packaging"+    },+    {+      "mpn": "LT8609AIMSE#PBFHMSE",+      "kind": "packaging"+    },+    {+      "mpn": "LT8609AIMSE#PBFJMSE",+      "kind": "packaging"+    },+    {+      "mpn": "LT8609AIMSE#PBFEMSE16",+      "kind": "packaging"+    },+    {+      "mpn": "LT8609AIMSE16",+      "kind": "unknown"+    },+    {+      "mpn": "LT8609AIMSE#PBFHMSE16",+      "kind": "packaging"+    },+    {+      "mpn": "LT8609AIMSE#PBFJMSE16",+      "kind": "packaging"+    },+    {+      "mpn": "LT8609AIMSE#PBFEDDM",+      "kind": "packaging"+    },+    {+      "mpn": "LT8609AIMSE#PBFJDDM",+      "kind": "packaging"+    },+    {+      "mpn": "LT8609AIMSE#PBFHDDM",+      "kind": "packaging"+    },+    {+      "mpn": "LT8609AIMSE#PBFEDDM-3.3",+      "kind": "packaging"+    },+    {+      "mpn": "LT8609AIMSE#PBFJDDM-3.3",+      "kind": "packaging"+    },+    {+      "mpn": "LT8609AIMSE#PBFEDDM-5",+      "kind": "packaging"+    },+    {+      "mpn": "LT8609AIMSE#PBFJDDM-5",+      "kind": "packaging"+    },+    {+      "mpn": "LT8609AIMSE#PBFHDDM-5",+      "kind": "packaging"+    }+  ],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "lt8609aimse#pbf"+  ],+  "discovery_pitch": "LT8609AIMSE#PBF (Analog Devices) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +222,5 @@     "docs/lt8609aimse-pbf-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file