component
LT3045EMSE#TRPBF
Public Made by Adomby adom
Analog Devices Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, MSOP-12-EP. KiCad symbol, footprint and 3D as used on Adom boards; pin functions from the manufacturer datasheet.
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README.md+17−15@@ -4,25 +4,25 @@ **Analog Devices** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · MSOP-12-EP -LT3045EMSE#TRPBF from Analog Devices, in a MSOP-12-EP. Symbol, footprint and 3D model are the ones used on Adom board designs (KiCad official libraries). Pin functions are extracted from the manufacturer datasheet with page references. **Staged for validation: see the open items in the verification log above.**+LT3045EMSE#TRPBF from Analog Devices, in a MSOP-12-EP. Symbol, footprint and 3D model are the ones used on Adom board designs (KiCad official libraries). Pin functions are extracted from the manufacturer datasheet with page references. ## Pinout | Pin | Name | Type | Function | |---|---|---|---|-| 1 | IN | power_in | Input supply (shared with pins 2 and 3). Operating range 1.8V to 20V (abs max ±22V). Requires a bypass capacitor (≥4.7µF typ) close to the pin; include higher capacitance for large load transients. [datasheet p.12] |-| 2 | IN | passive | Input supply (shared with pins 2 and 3). Operating range 1.8V to 20V (abs max ±22V). Requires a bypass capacitor (≥4.7µF typ) close to the pin; include higher capacitance for large load transients. [datasheet p.12] |-| 3 | IN | passive | Input supply (shared with pins 2 and 3). Operating range 1.8V to 20V (abs max ±22V). Requires a bypass capacitor (≥4.7µF typ) close to the pin; include higher capacitance for large load transients. [datasheet p.12] |-| 4 | EN/UV | input | Enable / Undervoltage Lockout input. Pulling low (<1.18V typ) places the part in shutdown (IQ drops to <1µA). Rising trip point 1.24V typ with 130mV hysteresis. Can be driven by a resistor divider from IN to set a programmable input UVLO threshold. Absolute max ±22V. Tie to IN if unused — do not float. [datasheet p.12] |-| 5 | PG | open_collector | Power Good open-collector flag. Pulls low when PGFB is below 300mV (output out of regulation). Absolute max −0.3V to 22V. Float if unused. A parasitic substrate diode exists between PG and GND; do not pull below −0.3V. [datasheet p.12] |-| 6 | ILIM | passive | Current Limit Programming pin. Connect a resistor from ILIM to GND to program the current limit; programming scale factor ≈150mA·kΩ (e.g. 300Ω → 500mA limit). ILIM mirrors output current (1:500), so can be monitored as a 0V–300mV current-sense output. Tie to GND if programmable limit is not needed. Absolute max −0.3V to 1V. [datasheet p.12] |-| 7 | PGFB | input | Power Good Feedback input. PG asserts (pulls high / releases) when PGFB rises above 300mV typ (7mV hysteresis). Set the trip voltage with a divider between OUT, PGFB and GND: VOUT,trip = 0.3V·(1 + RPG2/RPG1). Also enables the fast start-up circuitry. Tie to IN if unused. Absolute max −0.3V to 22V. [datasheet p.12] |-| 8 | SET | passive | Error-amplifier inverting input and output-voltage set point. SET sources a precision 100µA (±1% initial) reference current; VOUT = 100µA · RSET sets the output from 0V to 15V. A capacitor from SET to GND improves noise, PSRR and transient response at the cost of start-up time. Kelvin-connect the SET resistor's ground to the load. Absolute max −0.3V to 16V, ±20mA. [datasheet p.12] |-| 9 | GND | power_in | Ground return. Tie to the exposed pad (pin 13) and to the ground sides of CSET and COUT. [datasheet p.12] |-| 10 | OUTS | input | Output Sense — non-inverting input of the error amplifier. Kelvin-connect OUTS directly to the output capacitor and the load for best transient performance and load regulation. OUT-to-OUTS differential ±1.2V max. Absolute max −0.3V to 16V, ±20mA. [datasheet p.13] |-| 11 | OUT | power_out | Regulated output (shared with pin 12). Supplies the load; requires a minimum 10µF ceramic output capacitor with ESR <20mΩ and ESL <2nH for stability. Delivers up to 500mA; adjustable 0V to 15V. Absolute max −0.3V to 16V. [datasheet p.13] |-| 12 | OUT | passive | Regulated output (shared with pin 12). Supplies the load; requires a minimum 10µF ceramic output capacitor with ESR <20mΩ and ESL <2nH for stability. Delivers up to 500mA; adjustable 0V to 15V. Absolute max −0.3V to 16V. [datasheet p.13] |-| 13 | GND | passive | Ground return. Tie to the exposed pad (pin 13) and to the ground sides of CSET and COUT. [datasheet p.12] |+| 1 | IN | power_in | Input (pins 1, 2, 3). These pins supply power to the regulator. The LT3045 requires a bypass capacitor at the IN pin; a 4.7µF input bypass capacitor generally suffices, while large load transients may require higher input capacitance. The LT3045 withstands reverse voltages on IN with respect to GND, OUTS and OUT. [datasheet p.12] |+| 2 | IN | passive | Input (pins 1, 2, 3). These pins supply power to the regulator. The LT3045 requires a bypass capacitor at the IN pin; a 4.7µF input bypass capacitor generally suffices, while large load transients may require higher input capacitance. The LT3045 withstands reverse voltages on IN with respect to GND, OUTS and OUT. [datasheet p.12] |+| 3 | IN | passive | Input (pins 1, 2, 3). These pins supply power to the regulator. The LT3045 requires a bypass capacitor at the IN pin; a 4.7µF input bypass capacitor generally suffices, while large load transients may require higher input capacitance. The LT3045 withstands reverse voltages on IN with respect to GND, OUTS and OUT. [datasheet p.12] |+| 4 | EN/UV | input | Enable/UVLO. Pulling EN/UV low places the part in shutdown: quiescent current drops to less than 1µA and the output turns off. A resistor divider between IN, EN/UV and GND can set an input undervoltage lockout threshold; the part typically turns on when EN/UV exceeds 1.24V on its rising edge, with 130mV hysteresis. EN/UV can be driven above the input voltage. If unused, tie EN/UV to IN. Do not float the EN/UV pin. [datasheet p.12] |+| 5 | PG | open_collector | Power Good. Open-collector flag that indicates output voltage regulation; PG pulls low if PGFB is below 300mV. If the power good function is not needed, float the PG pin. Do not drive PG more than 0.3V below GND (parasitic substrate diode to GND). [datasheet p.12] |+| 6 | ILIM | passive | Current Limit Programming Pin. A resistor between ILIM and GND programs the current limit (scale factor nominally 150mA•kΩ); for best accuracy, Kelvin connect it directly to the GND pin. ILIM sources current proportional (1:500) to output current, so it also serves as a current monitoring pin with a 0V to 300mV range. If the programmable current limit is not needed, tie ILIM to GND. Do not drive ILIM more than 0.3V below GND. [datasheet p.12] |+| 7 | PGFB | input | Power Good Feedback. PG pulls high if PGFB increases beyond 300mV on its rising edge, with 7mV hysteresis on its falling edge. A resistor divider between OUT, PGFB and GND sets the power good threshold: 0.3V • (1 + RPG2/RPG1). PGFB also activates the fast start-up circuitry. Tie PGFB to IN if power good and fast start-up are not needed. Do not drive PGFB more than 0.3V below GND. [datasheet p.12] |+| 8 | SET | passive | Inverting input of the error amplifier and the regulation set-point. SET sources a precision 100µA current through an external resistor between SET and GND; VSET = ISET • RSET, output range zero to 15V. A capacitor from SET to GND improves noise, PSRR and transient response at the expense of start-up time. For optimum load regulation, Kelvin connect the ground side of the SET resistor directly to the load. Do not drive SET more than 0.3V below GND. [datasheet p.12] |+| 9 | GND | power_in | Ground. The exposed pad (pin 13) is an electrical connection to GND; tie it directly to this GND pin. [datasheet p.12] |+| 10 | OUTS | input | Output Sense. Non-inverting input to the error amplifier. For optimal transient performance and load regulation, Kelvin connect OUTS directly to the output capacitor and the load, and tie the GND connections of the output capacitor and the SET pin capacitor directly together. Do not drive OUTS more than 0.3V below GND. [datasheet p.13] |+| 11 | OUT | power_out | Output (pins 11, 12). Supplies power to the load. For stability, use a minimum 10µF output capacitor with an ESR below 20mΩ and an ESL below 2nH; large load transients require larger output capacitance. Do not drive OUT more than 0.3V below GND. [datasheet p.13] |+| 12 | OUT | passive | Output (pins 11, 12). Supplies power to the load. For stability, use a minimum 10µF output capacitor with an ESR below 20mΩ and an ESL below 2nH; large load transients require larger output capacitance. Do not drive OUT more than 0.3V below GND. [datasheet p.13] |+| 13 | GND | passive | Exposed pad, GND. The exposed backside is an electrical connection to GND; for proper electrical and thermal performance, solder it to the PCB ground and tie it directly to the GND pin (9). [datasheet p.12] | ## Key specifications @@ -33,6 +33,8 @@ LT3045EMSE#TRPBF from Analog Devices, in a MSOP-12-EP. Symbol, footprint and 3D | Category | Power Management (PMIC) | | Pins | 13 | | LCSC | C666577 |+| Mouser | 584-LT3045EMSE#TRPBF |+| DigiKey | 505-LT3045EMSE#TRPBFTR-ND | | Distributor summary (LCSC listing, not datasheet) | -40℃~+125℃@(Tj) 0.8uVrms 0V~15V 1 20V 260mV@(500mA) 500mA 76dB@(1MHz) Adjustable Positive Under Voltage Lockout、PG Pin、Over Current Protection、Over Temperature Protection、Enable、Short Circuit Protection MSOP-12-EP Voltage Regulators - Linear, Low Drop Out (LDO) Regulators ROHS | ## CAD@@ -45,7 +47,7 @@ LT3045EMSE#TRPBF from Analog Devices, in a MSOP-12-EP. Symbol, footprint and 3D ## Provenance -- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886313106362368) (sha256 `79a19c48f10093eb`, retrieved 2026-10-16, tier: lcsc)+- **Datasheet:** [Analog Devices LT3045 datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/lt3045.pdf) (Rev. D, 11/22, sha256 `9132e595759a58a0`, retrieved 2026-10-27, tier: mfr) - **CAD:** KiCad official libraries (CC-BY-SA 4.0); footprint and symbol as used on Adom boards. - **Pins:** KiCad symbol from the source board + adom-ds2sf datasheet extraction (claude-opus-4-7).
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lt3045emse-trpbf.kicad_mod+1−1@@ -21,7 +21,7 @@ (font (size 1 1) (thickness 0.15)) ) )- (property "Datasheet" "https://www.analog.com/media/en/technical-documentation/data-sheets/3045fa.pdf"+ (property "Datasheet" "https://www.analog.com/media/en/technical-documentation/data-sheets/lt3045.pdf" (at 0 0 180) (layer "F.Fab") (hide yes)
lt3045emse-trpbf.kicad_sym+1−1@@ -55,7 +55,7 @@ (font (size 1.27 1.27)) ) )- (property "Datasheet" "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886313106362368"+ (property "Datasheet" "https://www.analog.com/media/en/technical-documentation/data-sheets/lt3045.pdf" (at 0 0 0) (show_name no) (do_not_autoplace no)
lt3045emse-trpbf.lbr+1−1@@ -140,7 +140,7 @@ <technology name=""> <attribute name="MPN" value="LT3045EMSE#TRPBF" constant="no"/> <attribute name="MANUFACTURER" value="Analog Devices" constant="no"/>- <attribute name="DATASHEET" value="https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886313106362368" constant="no"/>+ <attribute name="DATASHEET" value="https://www.analog.com/media/en/technical-documentation/data-sheets/lt3045.pdf" constant="no"/> <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/lt3045emse-trpbf" constant="no"/> <attribute name="MOUSER_PN" value="584-LT3045EMSE#TRPBF" constant="no"/> <attribute name="DIGIKEY_PN" value="505-LT3045EMSE#TRPBFTR-ND" constant="no"/>
package.json+26−29@@ -1,13 +1,12 @@ { "slug": "lt3045emse-trpbf",- "version": "0.1.0",+ "version": "0.1.1", "type": "component", "tags": [ "component", "power management (pmic)", "lt3045emse-trpbf",- "board-derived",- "staged-for-validation"+ "board-derived" ], "dependencies": {}, "hero": {@@ -27,8 +26,8 @@ "lt3045emse-trpbf.lbr", "docs/hero.png", "docs/lt3045emse-trpbf-datasheet.pdf",- "viewers/symbol.html",- "viewers/footprint.html"+ "lt3045emse-trpbf-hero.glb",+ "lt3045emse-trpbf-hero.overlay.json" ], "component": { "mpn": "LT3045EMSE#TRPBF",@@ -37,12 +36,12 @@ "pin_count": 13, "category": "Power Management (PMIC)", "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",- "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886313106362368",+ "datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/lt3045.pdf", "parts": { "symbol": "lt3045emse-trpbf.kicad_sym", "footprint": "lt3045emse-trpbf.kicad_mod",- "model_3d": "lt3045emse-trpbf-etched.glb",- "model_3d_plain": "lt3045emse-trpbf.glb",+ "model_3d": "lt3045emse-trpbf-hero.glb",+ "model_3d_plain": "lt3045emse-trpbf-etched.glb", "model_3d_step": "lt3045emse-trpbf-etched.step", "model_3d_step_plain": "lt3045emse-trpbf.step", "lbr": "lt3045emse-trpbf.lbr"@@ -66,79 +65,79 @@ "number": "1", "name": "IN", "type": "power_in",- "description": "Input supply (shared with pins 2 and 3). Operating range 1.8V to 20V (abs max ±22V). Requires a bypass capacitor (≥4.7µF typ) close to the pin; include higher capacitance for large load transients. [datasheet p.12]"+ "description": "Input (pins 1, 2, 3). These pins supply power to the regulator. The LT3045 requires a bypass capacitor at the IN pin; a 4.7µF input bypass capacitor generally suffices, while large load transients may require higher input capacitance. The LT3045 withstands reverse voltages on IN with respect to GND, OUTS and OUT. [datasheet p.12]" }, { "number": "2", "name": "IN", "type": "passive",- "description": "Input supply (shared with pins 2 and 3). Operating range 1.8V to 20V (abs max ±22V). Requires a bypass capacitor (≥4.7µF typ) close to the pin; include higher capacitance for large load transients. [datasheet p.12]"+ "description": "Input (pins 1, 2, 3). These pins supply power to the regulator. The LT3045 requires a bypass capacitor at the IN pin; a 4.7µF input bypass capacitor generally suffices, while large load transients may require higher input capacitance. The LT3045 withstands reverse voltages on IN with respect to GND, OUTS and OUT. [datasheet p.12]" }, { "number": "3", "name": "IN", "type": "passive",- "description": "Input supply (shared with pins 2 and 3). Operating range 1.8V to 20V (abs max ±22V). Requires a bypass capacitor (≥4.7µF typ) close to the pin; include higher capacitance for large load transients. [datasheet p.12]"+ "description": "Input (pins 1, 2, 3). These pins supply power to the regulator. The LT3045 requires a bypass capacitor at the IN pin; a 4.7µF input bypass capacitor generally suffices, while large load transients may require higher input capacitance. The LT3045 withstands reverse voltages on IN with respect to GND, OUTS and OUT. [datasheet p.12]" }, { "number": "4", "name": "EN/UV", "type": "input",- "description": "Enable / Undervoltage Lockout input. Pulling low (<1.18V typ) places the part in shutdown (IQ drops to <1µA). Rising trip point 1.24V typ with 130mV hysteresis. Can be driven by a resistor divider from IN to set a programmable input UVLO threshold. Absolute max ±22V. Tie to IN if unused — do not float. [datasheet p.12]"+ "description": "Enable/UVLO. Pulling EN/UV low places the part in shutdown: quiescent current drops to less than 1µA and the output turns off. A resistor divider between IN, EN/UV and GND can set an input undervoltage lockout threshold; the part typically turns on when EN/UV exceeds 1.24V on its rising edge, with 130mV hysteresis. EN/UV can be driven above the input voltage. If unused, tie EN/UV to IN. Do not float the EN/UV pin. [datasheet p.12]" }, { "number": "5", "name": "PG", "type": "open_collector",- "description": "Power Good open-collector flag. Pulls low when PGFB is below 300mV (output out of regulation). Absolute max −0.3V to 22V. Float if unused. A parasitic substrate diode exists between PG and GND; do not pull below −0.3V. [datasheet p.12]"+ "description": "Power Good. Open-collector flag that indicates output voltage regulation; PG pulls low if PGFB is below 300mV. If the power good function is not needed, float the PG pin. Do not drive PG more than 0.3V below GND (parasitic substrate diode to GND). [datasheet p.12]" }, { "number": "6", "name": "ILIM", "type": "passive",- "description": "Current Limit Programming pin. Connect a resistor from ILIM to GND to program the current limit; programming scale factor ≈150mA·kΩ (e.g. 300Ω → 500mA limit). ILIM mirrors output current (1:500), so can be monitored as a 0V–300mV current-sense output. Tie to GND if programmable limit is not needed. Absolute max −0.3V to 1V. [datasheet p.12]"+ "description": "Current Limit Programming Pin. A resistor between ILIM and GND programs the current limit (scale factor nominally 150mA•kΩ); for best accuracy, Kelvin connect it directly to the GND pin. ILIM sources current proportional (1:500) to output current, so it also serves as a current monitoring pin with a 0V to 300mV range. If the programmable current limit is not needed, tie ILIM to GND. Do not drive ILIM more than 0.3V below GND. [datasheet p.12]" }, { "number": "7", "name": "PGFB", "type": "input",- "description": "Power Good Feedback input. PG asserts (pulls high / releases) when PGFB rises above 300mV typ (7mV hysteresis). Set the trip voltage with a divider between OUT, PGFB and GND: VOUT,trip = 0.3V·(1 + RPG2/RPG1). Also enables the fast start-up circuitry. Tie to IN if unused. Absolute max −0.3V to 22V. [datasheet p.12]"+ "description": "Power Good Feedback. PG pulls high if PGFB increases beyond 300mV on its rising edge, with 7mV hysteresis on its falling edge. A resistor divider between OUT, PGFB and GND sets the power good threshold: 0.3V • (1 + RPG2/RPG1). PGFB also activates the fast start-up circuitry. Tie PGFB to IN if power good and fast start-up are not needed. Do not drive PGFB more than 0.3V below GND. [datasheet p.12]" }, { "number": "8", "name": "SET", "type": "passive",- "description": "Error-amplifier inverting input and output-voltage set point. SET sources a precision 100µA (±1% initial) reference current; VOUT = 100µA · RSET sets the output from 0V to 15V. A capacitor from SET to GND improves noise, PSRR and transient response at the cost of start-up time. Kelvin-connect the SET resistor's ground to the load. Absolute max −0.3V to 16V, ±20mA. [datasheet p.12]"+ "description": "Inverting input of the error amplifier and the regulation set-point. SET sources a precision 100µA current through an external resistor between SET and GND; VSET = ISET • RSET, output range zero to 15V. A capacitor from SET to GND improves noise, PSRR and transient response at the expense of start-up time. For optimum load regulation, Kelvin connect the ground side of the SET resistor directly to the load. Do not drive SET more than 0.3V below GND. [datasheet p.12]" }, { "number": "9", "name": "GND", "type": "power_in",- "description": "Ground return. Tie to the exposed pad (pin 13) and to the ground sides of CSET and COUT. [datasheet p.12]"+ "description": "Ground. The exposed pad (pin 13) is an electrical connection to GND; tie it directly to this GND pin. [datasheet p.12]" }, { "number": "10", "name": "OUTS", "type": "input",- "description": "Output Sense — non-inverting input of the error amplifier. Kelvin-connect OUTS directly to the output capacitor and the load for best transient performance and load regulation. OUT-to-OUTS differential ±1.2V max. Absolute max −0.3V to 16V, ±20mA. [datasheet p.13]"+ "description": "Output Sense. Non-inverting input to the error amplifier. For optimal transient performance and load regulation, Kelvin connect OUTS directly to the output capacitor and the load, and tie the GND connections of the output capacitor and the SET pin capacitor directly together. Do not drive OUTS more than 0.3V below GND. [datasheet p.13]" }, { "number": "11", "name": "OUT", "type": "power_out",- "description": "Regulated output (shared with pin 12). Supplies the load; requires a minimum 10µF ceramic output capacitor with ESR <20mΩ and ESL <2nH for stability. Delivers up to 500mA; adjustable 0V to 15V. Absolute max −0.3V to 16V. [datasheet p.13]"+ "description": "Output (pins 11, 12). Supplies power to the load. For stability, use a minimum 10µF output capacitor with an ESR below 20mΩ and an ESL below 2nH; large load transients require larger output capacitance. Do not drive OUT more than 0.3V below GND. [datasheet p.13]" }, { "number": "12", "name": "OUT", "type": "passive",- "description": "Regulated output (shared with pin 12). Supplies the load; requires a minimum 10µF ceramic output capacitor with ESR <20mΩ and ESL <2nH for stability. Delivers up to 500mA; adjustable 0V to 15V. Absolute max −0.3V to 16V. [datasheet p.13]"+ "description": "Output (pins 11, 12). Supplies power to the load. For stability, use a minimum 10µF output capacitor with an ESR below 20mΩ and an ESL below 2nH; large load transients require larger output capacitance. Do not drive OUT more than 0.3V below GND. [datasheet p.13]" }, { "number": "13", "name": "GND", "type": "passive",- "description": "Ground return. Tie to the exposed pad (pin 13) and to the ground sides of CSET and COUT. [datasheet p.12]"+ "description": "Exposed pad, GND. The exposed backside is an electrical connection to GND; for proper electrical and thermal performance, solder it to the PCB ground and tie it directly to the GND pin (9). [datasheet p.12]" } ], "provenance": {@@ -148,10 +147,12 @@ "at": "2026-10-16" }, "datasheet": {- "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886313106362368",+ "url": "https://www.analog.com/media/en/technical-documentation/data-sheets/lt3045.pdf", "pages": 32,- "sha256": "79a19c48f10093ebc869285b2d3ccd52766d63f4d2861f138b58e728080d2caf",- "source_tier": "lcsc"+ "sha256": "9132e595759a58a0920e7c63997872df02ca9ce598ead76c6f7a31051405eba6",+ "source_tier": "mfr",+ "retrieved": "2026-10-27",+ "edition": "Rev. D, 11/22" }, "cad": "KiCad official libraries (CC-BY-SA 4.0); footprint and symbol as used on Adom boards", "pins": {@@ -161,10 +162,6 @@ "refuses_to_fabricate": true } },- "viewers": {- "symbol": "viewers/symbol.html",- "footprint": "viewers/footprint.html"- }, "models_3d": [ { "file": "lt3045emse-trpbf.step",@@ -205,4 +202,4 @@ ] }, "description": "Analog Devices Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, MSOP-12-EP. KiCad symbol, footprint and 3D as used on Adom boards; pin functions from the manufacturer datasheet."-}+}
page.json+31−28@@ -4,14 +4,13 @@ "slug": "lt3045emse-trpbf", "title": "LT3045EMSE#TRPBF", "brief": "Analog Devices Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, MSOP-12-EP. KiCad symbol, footprint and 3D as used on Adom boards; pin functions from the manufacturer datasheet.",- "version": "0.1.0",+ "version": "0.1.1", "license": "CC-BY-SA-4.0", "tags": [ "component", "power management (pmic)", "lt3045emse-trpbf",- "board-derived",- "staged-for-validation"+ "board-derived" ], "component": { "mpn": "LT3045EMSE#TRPBF",@@ -20,12 +19,12 @@ "pin_count": 13, "category": "Power Management (PMIC)", "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",- "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886313106362368",+ "datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/lt3045.pdf", "parts": { "symbol": "lt3045emse-trpbf.kicad_sym", "footprint": "lt3045emse-trpbf.kicad_mod",- "model_3d": "lt3045emse-trpbf-etched.glb",- "model_3d_plain": "lt3045emse-trpbf.glb",+ "model_3d": "lt3045emse-trpbf-hero.glb",+ "model_3d_plain": "lt3045emse-trpbf-etched.glb", "model_3d_step": "lt3045emse-trpbf-etched.step", "model_3d_step_plain": "lt3045emse-trpbf.step", "lbr": "lt3045emse-trpbf.lbr"@@ -49,79 +48,79 @@ "number": "1", "name": "IN", "type": "power_in",- "description": "Input supply (shared with pins 2 and 3). Operating range 1.8V to 20V (abs max ±22V). Requires a bypass capacitor (≥4.7µF typ) close to the pin; include higher capacitance for large load transients. [datasheet p.12]"+ "description": "Input (pins 1, 2, 3). These pins supply power to the regulator. The LT3045 requires a bypass capacitor at the IN pin; a 4.7µF input bypass capacitor generally suffices, while large load transients may require higher input capacitance. The LT3045 withstands reverse voltages on IN with respect to GND, OUTS and OUT. [datasheet p.12]" }, { "number": "2", "name": "IN", "type": "passive",- "description": "Input supply (shared with pins 2 and 3). Operating range 1.8V to 20V (abs max ±22V). Requires a bypass capacitor (≥4.7µF typ) close to the pin; include higher capacitance for large load transients. [datasheet p.12]"+ "description": "Input (pins 1, 2, 3). These pins supply power to the regulator. The LT3045 requires a bypass capacitor at the IN pin; a 4.7µF input bypass capacitor generally suffices, while large load transients may require higher input capacitance. The LT3045 withstands reverse voltages on IN with respect to GND, OUTS and OUT. [datasheet p.12]" }, { "number": "3", "name": "IN", "type": "passive",- "description": "Input supply (shared with pins 2 and 3). Operating range 1.8V to 20V (abs max ±22V). Requires a bypass capacitor (≥4.7µF typ) close to the pin; include higher capacitance for large load transients. [datasheet p.12]"+ "description": "Input (pins 1, 2, 3). These pins supply power to the regulator. The LT3045 requires a bypass capacitor at the IN pin; a 4.7µF input bypass capacitor generally suffices, while large load transients may require higher input capacitance. The LT3045 withstands reverse voltages on IN with respect to GND, OUTS and OUT. [datasheet p.12]" }, { "number": "4", "name": "EN/UV", "type": "input",- "description": "Enable / Undervoltage Lockout input. Pulling low (<1.18V typ) places the part in shutdown (IQ drops to <1µA). Rising trip point 1.24V typ with 130mV hysteresis. Can be driven by a resistor divider from IN to set a programmable input UVLO threshold. Absolute max ±22V. Tie to IN if unused — do not float. [datasheet p.12]"+ "description": "Enable/UVLO. Pulling EN/UV low places the part in shutdown: quiescent current drops to less than 1µA and the output turns off. A resistor divider between IN, EN/UV and GND can set an input undervoltage lockout threshold; the part typically turns on when EN/UV exceeds 1.24V on its rising edge, with 130mV hysteresis. EN/UV can be driven above the input voltage. If unused, tie EN/UV to IN. Do not float the EN/UV pin. [datasheet p.12]" }, { "number": "5", "name": "PG", "type": "open_collector",- "description": "Power Good open-collector flag. Pulls low when PGFB is below 300mV (output out of regulation). Absolute max −0.3V to 22V. Float if unused. A parasitic substrate diode exists between PG and GND; do not pull below −0.3V. [datasheet p.12]"+ "description": "Power Good. Open-collector flag that indicates output voltage regulation; PG pulls low if PGFB is below 300mV. If the power good function is not needed, float the PG pin. Do not drive PG more than 0.3V below GND (parasitic substrate diode to GND). [datasheet p.12]" }, { "number": "6", "name": "ILIM", "type": "passive",- "description": "Current Limit Programming pin. Connect a resistor from ILIM to GND to program the current limit; programming scale factor ≈150mA·kΩ (e.g. 300Ω → 500mA limit). ILIM mirrors output current (1:500), so can be monitored as a 0V–300mV current-sense output. Tie to GND if programmable limit is not needed. Absolute max −0.3V to 1V. [datasheet p.12]"+ "description": "Current Limit Programming Pin. A resistor between ILIM and GND programs the current limit (scale factor nominally 150mA•kΩ); for best accuracy, Kelvin connect it directly to the GND pin. ILIM sources current proportional (1:500) to output current, so it also serves as a current monitoring pin with a 0V to 300mV range. If the programmable current limit is not needed, tie ILIM to GND. Do not drive ILIM more than 0.3V below GND. [datasheet p.12]" }, { "number": "7", "name": "PGFB", "type": "input",- "description": "Power Good Feedback input. PG asserts (pulls high / releases) when PGFB rises above 300mV typ (7mV hysteresis). Set the trip voltage with a divider between OUT, PGFB and GND: VOUT,trip = 0.3V·(1 + RPG2/RPG1). Also enables the fast start-up circuitry. Tie to IN if unused. Absolute max −0.3V to 22V. [datasheet p.12]"+ "description": "Power Good Feedback. PG pulls high if PGFB increases beyond 300mV on its rising edge, with 7mV hysteresis on its falling edge. A resistor divider between OUT, PGFB and GND sets the power good threshold: 0.3V • (1 + RPG2/RPG1). PGFB also activates the fast start-up circuitry. Tie PGFB to IN if power good and fast start-up are not needed. Do not drive PGFB more than 0.3V below GND. [datasheet p.12]" }, { "number": "8", "name": "SET", "type": "passive",- "description": "Error-amplifier inverting input and output-voltage set point. SET sources a precision 100µA (±1% initial) reference current; VOUT = 100µA · RSET sets the output from 0V to 15V. A capacitor from SET to GND improves noise, PSRR and transient response at the cost of start-up time. Kelvin-connect the SET resistor's ground to the load. Absolute max −0.3V to 16V, ±20mA. [datasheet p.12]"+ "description": "Inverting input of the error amplifier and the regulation set-point. SET sources a precision 100µA current through an external resistor between SET and GND; VSET = ISET • RSET, output range zero to 15V. A capacitor from SET to GND improves noise, PSRR and transient response at the expense of start-up time. For optimum load regulation, Kelvin connect the ground side of the SET resistor directly to the load. Do not drive SET more than 0.3V below GND. [datasheet p.12]" }, { "number": "9", "name": "GND", "type": "power_in",- "description": "Ground return. Tie to the exposed pad (pin 13) and to the ground sides of CSET and COUT. [datasheet p.12]"+ "description": "Ground. The exposed pad (pin 13) is an electrical connection to GND; tie it directly to this GND pin. [datasheet p.12]" }, { "number": "10", "name": "OUTS", "type": "input",- "description": "Output Sense — non-inverting input of the error amplifier. Kelvin-connect OUTS directly to the output capacitor and the load for best transient performance and load regulation. OUT-to-OUTS differential ±1.2V max. Absolute max −0.3V to 16V, ±20mA. [datasheet p.13]"+ "description": "Output Sense. Non-inverting input to the error amplifier. For optimal transient performance and load regulation, Kelvin connect OUTS directly to the output capacitor and the load, and tie the GND connections of the output capacitor and the SET pin capacitor directly together. Do not drive OUTS more than 0.3V below GND. [datasheet p.13]" }, { "number": "11", "name": "OUT", "type": "power_out",- "description": "Regulated output (shared with pin 12). Supplies the load; requires a minimum 10µF ceramic output capacitor with ESR <20mΩ and ESL <2nH for stability. Delivers up to 500mA; adjustable 0V to 15V. Absolute max −0.3V to 16V. [datasheet p.13]"+ "description": "Output (pins 11, 12). Supplies power to the load. For stability, use a minimum 10µF output capacitor with an ESR below 20mΩ and an ESL below 2nH; large load transients require larger output capacitance. Do not drive OUT more than 0.3V below GND. [datasheet p.13]" }, { "number": "12", "name": "OUT", "type": "passive",- "description": "Regulated output (shared with pin 12). Supplies the load; requires a minimum 10µF ceramic output capacitor with ESR <20mΩ and ESL <2nH for stability. Delivers up to 500mA; adjustable 0V to 15V. Absolute max −0.3V to 16V. [datasheet p.13]"+ "description": "Output (pins 11, 12). Supplies power to the load. For stability, use a minimum 10µF output capacitor with an ESR below 20mΩ and an ESL below 2nH; large load transients require larger output capacitance. Do not drive OUT more than 0.3V below GND. [datasheet p.13]" }, { "number": "13", "name": "GND", "type": "passive",- "description": "Ground return. Tie to the exposed pad (pin 13) and to the ground sides of CSET and COUT. [datasheet p.12]"+ "description": "Exposed pad, GND. The exposed backside is an electrical connection to GND; for proper electrical and thermal performance, solder it to the PCB ground and tie it directly to the GND pin (9). [datasheet p.12]" } ], "provenance": {@@ -131,10 +130,12 @@ "at": "2026-10-16" }, "datasheet": {- "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886313106362368",+ "url": "https://www.analog.com/media/en/technical-documentation/data-sheets/lt3045.pdf", "pages": 32,- "sha256": "79a19c48f10093ebc869285b2d3ccd52766d63f4d2861f138b58e728080d2caf",- "source_tier": "lcsc"+ "sha256": "9132e595759a58a0920e7c63997872df02ca9ce598ead76c6f7a31051405eba6",+ "source_tier": "mfr",+ "retrieved": "2026-10-27",+ "edition": "Rev. D, 11/22" }, "cad": "KiCad official libraries (CC-BY-SA 4.0); footprint and symbol as used on Adom boards", "pins": {@@ -157,7 +158,7 @@ 4.039, 0.95 ],- "zmin_mm": -0.0,+ "zmin_mm": 0, "footprint_binding": "identity", "sha256": "aa91d924a017af1cf431a9ac1a666764cb189eca8b73b8867170c8507343c645", "checked": "2026-10-16",@@ -175,7 +176,7 @@ 4.039, 0.952 ],- "zmin_mm": -0.0,+ "zmin_mm": 0, "footprint_binding": "identity", "sha256": "ffe31a3b0784f35925731cae4398558ee81a504257f78d3559c9b08991de0358", "checked": "2026-10-16",@@ -226,9 +227,11 @@ "lt3045emse-trpbf.step", "lt3045emse-trpbf.lbr", "docs/hero.png",- "docs/lt3045emse-trpbf-datasheet.pdf"+ "docs/lt3045emse-trpbf-datasheet.pdf",+ "lt3045emse-trpbf-hero.glb",+ "lt3045emse-trpbf-hero.overlay.json" ],- "visibility": {- "public": false- }+ "visibility": "public",+ "description": "Analog Devices Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, MSOP-12-EP. KiCad symbol, footprint and 3D as used on Adom boards; pin functions from the manufacturer datasheet.",+ "org": "adom" }
verification.json+80−1@@ -9,7 +9,7 @@ "name": "Claude (AI build)", "handle": "claude" },- "status": "open",+ "status": "superseded", "title": "Automated build checks (awaiting human validation)", "scope": [ "symbol",@@ -53,6 +53,85 @@ "lt3045emse-trpbf.kicad_mod": "155153b0ed37ff2db086e2e6bf156b34e26dcd6957cdcfd00c4cfec03f92ea95", "lt3045emse-trpbf.step": "aa91d924a017af1cf431a9ac1a666764cb189eca8b73b8867170c8507343c645" }+ },+ {+ "date": "2026-10-27",+ "by": {+ "name": "Claude, at Caleb Taylor's request",+ "handle": "claude"+ },+ "status": "verified",+ "title": "Validated against Analog Devices' LT3045 datasheet (Rev. D, 11/22)",+ "scope": [+ "symbol",+ "footprint",+ "3d",+ "pins"+ ],+ "variants": [+ "*"+ ],+ "checks": [+ {+ "text": "Datasheet replaced: the page carried a JLCPCB copy (tier lcsc, Rev. B); now ADI's Rev. D (11/22, 32 pages) from analog.com/media/en/technical-documentation/data-sheets/lt3045.pdf, fetched 2026-10-27",+ "result": "pass"+ },+ {+ "text": "Orderable LT3045EMSE#TRPBF is the tape-and-reel 12-lead plastic MSOP (MSE), marking 3045, -40 to 125 °C (Order Information, p.2)",+ "result": "pass"+ },+ {+ "text": "All 13 pins match the MSE pin configuration (p.2) and Pin Functions (p.12-13) by number and name: IN 1/2/3, EN/UV 4, PG 5, ILIM 6, PGFB 7, SET 8, GND 9, OUTS 10, OUT 11/12, exposed pad 13 = GND ('EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB'); no renames needed",+ "result": "pass"+ },+ {+ "text": "Pin types: IN power_in, EN/UV and PGFB input, PG open_collector (open-collector flag), OUTS input (error amplifier input), OUT power_out, GND power_in; ILIM (programming pin that sources a current) and SET (error amplifier input that sources 100µA) kept passive",+ "result": "pass"+ },+ {+ "text": "Shared pins: pins 2/3 (IN), 12 (OUT) and 13 (GND, exposed pad) are hidden pins stacked at the same coordinates as visible pins 1, 11 and 9, and are typed passive. This is KiCad's stacked-pin convention: a hidden power_in pin would join an implicit global net named after the pin, and stacked power_out pins would conflict in ERC. The visible pin of each stack has the datasheet's type, so each net has one power_in, power_out or power_in pin",+ "result": "note"+ },+ {+ "text": "All 13 descriptions rewritten from Pin Functions (p.12-13). The old text was copied across stacked pins: pins 2 and 3 said 'shared with pins 2 and 3' and pin 12 said 'shared with pin 12'; now every IN pin says 'pins 1, 2, 3' and every OUT pin 'pins 11, 12'. Dropped values that are not in the pin functions (1.8V to 20V range, ±22V, 1.18V, 500mA)",+ "result": "pass"+ },+ {+ "text": "Footprint vs MSE package 05-08-1666 Rev G (p.30): 12 pads at e = 0.65 mm, pin 1 top-left, 1-6 down the left, 7-12 up the right, as the p.2 top view; pads 1.45 x 0.40 at x = ±2.15 against ADI's recommended 0.889 ±0.127 x 0.42 ±0.038 (inner edges 3.20-3.45 apart, outer span 5.10 min); the KiCad pads are longer (inner edges 2.85 apart, outer span 5.75) and 0.40 wide (within 0.382-0.458), and cover the leads: tips at 4.90 ±0.152 span, foot 0.53 ±0.152, lead width 0.22-0.38",+ "result": "pass"+ },+ {+ "text": "Exposed pad 13: 1.651 x 2.845 mm at the centre, long side along the lead rows, equal to the drawing's 1.651 ±0.102 x 2.845 ±0.102 and ADI's recommended pad; copper and mask, with four 0.67 x 1.15 paste windows",+ "result": "pass"+ },+ {+ "text": "3D body 4.90 x 4.039 x 0.95 mm against lead span 4.90 ±0.152, body 4.039 ±0.102 (and 3.00 ±0.102 across), height 1.10 max (p.30); seated on z = 0, centred on the pads, pin-1 dot at the top-left corner (matching GLB)",+ "result": "pass"+ },+ {+ "text": "DigiKey 505-LT3045EMSE#TRPBFTR-ND (tape and reel; DigiKey product URL names LT3045EMSE-TRPBF) and Mouser 584-LT3045EMSE#TRPBF kept and added to specs",+ "result": "pass"+ },+ {+ "text": "Symbol and footprint Datasheet properties point at the manufacturer datasheet URL",+ "result": "pass"+ },+ {+ "text": "component-page-verify: all checks pass",+ "result": "pass"+ }+ ],+ "evidence": [+ {+ "label": "datasheet (Analog Devices)",+ "href": "https://www.analog.com/media/en/technical-documentation/data-sheets/lt3045.pdf"+ }+ ],+ "files": {+ "lt3045emse-trpbf.kicad_sym": "26438914ebead5df3e5ff61f00611d62a70911aa300227c73ad19b094c11000c",+ "lt3045emse-trpbf.kicad_mod": "47e0e1ae3082f1369bab49f8a8a3562ede49244ad85723df2414a3d6cc76f9b0",+ "lt3045emse-trpbf.step": "aa91d924a017af1cf431a9ac1a666764cb189eca8b73b8867170c8507343c645"+ } } ] }