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Initial commit: component/lp873248rhdrq1

Ray ·251d7d45f0 ·22h ago
2 files changed +392
README.mdadded+65
@@ -0,0 +1,65 @@+# LP873248RHDRQ1++**Texas Instruments** · DC-DC Converters · VQFN-28(5x5)++LP873248RHDRQ1 from Texas Instruments, in a VQFN-28(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VOUT_LDO0 | power_out | LDO0 regulator output; leave the pin floating if LDO0 is not used. |+| 2 | FB_B0 | input | Positive output-voltage feedback sense input for Buck 0. |+| 3 | FB_B1 | input | Positive output-voltage feedback for Buck 1 in two single-phase configuration, and negative (output ground) feedback for Buck 0 in dual-phase configuration. |+| 4 | AGND | power_in | Analog ground. |+| 5 | VANA | power_in | Supply voltage for analog and digital blocks; must be connected to the same node as the VIN_Bx pins (2.8 V to 5.5 V recommended operating range). |+| 6 | EN | input | Programmable enable signal for the regulators and GPOs; leave floating if not used (the pin has an optional internal pull-down set by EN_PD). |+| 7 | VOUT_LDO1 | power_out | LDO1 regulator output; leave the pin floating if LDO1 is not used. |+| 8 | VIN_LDO1 | power_in | Power input for LDO1 (2.5 V to 5.5 V); connect to VANA if LDO1 is not used. |+| 9 | nINT | output | Open-drain interrupt output, active low; connect to ground if not used. |+| 10 | CLKIN | bidirectional | External clock input, with alternative function as general-purpose digital output GPO2 selected by CLKIN_PIN_SEL; leave floating if not used. |+| 11 | VIN_B1 | power_in | Power input for Buck 1; VIN_Bx pins are not connected internally and must be connected together externally and locally bypassed. |+| 12 | VIN_B1 | power_in | Power input for Buck 1; VIN_Bx pins are not connected internally and must be connected together externally and locally bypassed. |+| 13 | SW_B1 | power_out | Buck 1 switch node; leave floating if Buck 1 is not used. |+| 14 | SW_B1 | power_out | Buck 1 switch node; leave floating if Buck 1 is not used. |+| 15 | PGND_B1 | power_in | Power ground for Buck 1. |+| 16 | PGND_B1 | power_in | Power ground for Buck 1. |+| 17 | SCL | input | I2C serial interface clock input; connect a pullup resistor, or connect to ground if the I2C interface is not used. |+| 18 | SDA | bidirectional | I2C serial interface data input/output; connect a pullup resistor, or connect to ground if the I2C interface is not used. |+| 19 | SGND | power_in | Signal ground. |+| 20 | PGND_B0 | power_in | Power ground for Buck 0. |+| 21 | PGND_B0 | power_in | Power ground for Buck 0. |+| 22 | SW_B0 | power_out | Buck 0 switch node; leave floating if Buck 0 is not used. |+| 23 | SW_B0 | power_out | Buck 0 switch node; leave floating if Buck 0 is not used. |+| 24 | VIN_B0 | power_in | Power input for Buck 0; VIN_Bx pins are not connected internally and must be connected together externally and locally bypassed. |+| 25 | VIN_B0 | power_in | Power input for Buck 0; VIN_Bx pins are not connected internally and must be connected together externally and locally bypassed. |+| 26 | GPO | output | General-purpose digital output; leave the pin floating if not used. |+| 27 | PGOOD | output | Power-good indication output; leave the pin floating if not used. |+| 28 | VIN_LDO0 | power_in | Power input for LDO0 (2.5 V to 5.5 V); connect to VANA if LDO0 is not used. |+| 29 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-28(5x5) |+| Category | Power Management (PMIC) |+| Pins | 29 |++## CAD (KiCad official)++- Symbol: `LP873248RHDRQ1`+- Footprint: `Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm`+- 3D model: VQFN-28(5x5) (KiCad packages3D, STEP)+- 3D model files: `lp873248rhdrq1-etched.step` / `lp873248rhdrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lp873248rhdrq1.step` / `lp873248rhdrq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602584955302264832) (86 pp, sha256 `8824bbdf846706b5`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lp873248rhdrq1-datasheet.pdf)
page.jsonadded+327
@@ -0,0 +1,327 @@+{+  "slug": "lp873248rhdrq1",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments DC-DC Converters, VQFN-28(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "lp873248rhdrq1",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "lp873248rhdrq1.kicad_sym",+    "lp873248rhdrq1.kicad_mod",+    "lp873248rhdrq1.glb",+    "lp873248rhdrq1.step",+    "lp873248rhdrq1.lbr",+    "docs/hero.png",+    "docs/lp873248rhdrq1-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "lp873248rhdrq1-hero.glb",+    "lp873248rhdrq1-hero.overlay.json"+  ],+  "component": {+    "mpn": "LP873248RHDRQ1",+    "manufacturer": "Texas Instruments",+    "package": "VQFN-28(5x5)",+    "pin_count": 29,+    "category": "Power Management (PMIC)",+    "subcategory": "DC-DC Converters",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602584955302264832",+    "parts": {+      "symbol": "lp873248rhdrq1.kicad_sym",+      "footprint": "lp873248rhdrq1.kicad_mod",+      "model_3d": "lp873248rhdrq1-hero.glb",+      "model_3d_plain": "lp873248rhdrq1.glb",+      "model_3d_step": "lp873248rhdrq1-etched.step",+      "model_3d_step_plain": "lp873248rhdrq1.step",+      "lbr": "lp873248rhdrq1.lbr"+    },+    "distributor_links": {+      "lcsc": "C6079890",+      "digikey": "296-LP873248RHDRQ1TR-ND",+      "mouser": "595-LP873248RHDRQ1"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T19:47:37Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-LP873248RHDRQ1TR-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-LP873248RHDRQ1",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "VOUT_LDO0",+        "type": "power_out",+        "description": "LDO0 regulator output; leave the pin floating if LDO0 is not used."+      },+      {+        "number": "2",+        "name": "FB_B0",+        "type": "input",+        "description": "Positive output-voltage feedback sense input for Buck 0."+      },+      {+        "number": "3",+        "name": "FB_B1",+        "type": "input",+        "description": "Positive output-voltage feedback for Buck 1 in two single-phase configuration, and negative (output ground) feedback for Buck 0 in dual-phase configuration."+      },+      {+        "number": "4",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog ground."+      },+      {+        "number": "5",+        "name": "VANA",+        "type": "power_in",+        "description": "Supply voltage for analog and digital blocks; must be connected to the same node as the VIN_Bx pins (2.8 V to 5.5 V recommended operating range)."+      },+      {+        "number": "6",+        "name": "EN",+        "type": "input",+        "description": "Programmable enable signal for the regulators and GPOs; leave floating if not used (the pin has an optional internal pull-down set by EN_PD)."+      },+      {+        "number": "7",+        "name": "VOUT_LDO1",+        "type": "power_out",+        "description": "LDO1 regulator output; leave the pin floating if LDO1 is not used."+      },+      {+        "number": "8",+        "name": "VIN_LDO1",+        "type": "power_in",+        "description": "Power input for LDO1 (2.5 V to 5.5 V); connect to VANA if LDO1 is not used."+      },+      {+        "number": "9",+        "name": "nINT",+        "type": "output",+        "description": "Open-drain interrupt output, active low; connect to ground if not used."+      },+      {+        "number": "10",+        "name": "CLKIN",+        "type": "bidirectional",+        "description": "External clock input, with alternative function as general-purpose digital output GPO2 selected by CLKIN_PIN_SEL; leave floating if not used."+      },+      {+        "number": "11",+        "name": "VIN_B1",+        "type": "power_in",+        "description": "Power input for Buck 1; VIN_Bx pins are not connected internally and must be connected together externally and locally bypassed."+      },+      {+        "number": "12",+        "name": "VIN_B1",+        "type": "power_in",+        "description": "Power input for Buck 1; VIN_Bx pins are not connected internally and must be connected together externally and locally bypassed."+      },+      {+        "number": "13",+        "name": "SW_B1",+        "type": "power_out",+        "description": "Buck 1 switch node; leave floating if Buck 1 is not used."+      },+      {+        "number": "14",+        "name": "SW_B1",+        "type": "power_out",+        "description": "Buck 1 switch node; leave floating if Buck 1 is not used."+      },+      {+        "number": "15",+        "name": "PGND_B1",+        "type": "power_in",+        "description": "Power ground for Buck 1."+      },+      {+        "number": "16",+        "name": "PGND_B1",+        "type": "power_in",+        "description": "Power ground for Buck 1."+      },+      {+        "number": "17",+        "name": "SCL",+        "type": "input",+        "description": "I2C serial interface clock input; connect a pullup resistor, or connect to ground if the I2C interface is not used."+      },+      {+        "number": "18",+        "name": "SDA",+        "type": "bidirectional",+        "description": "I2C serial interface data input/output; connect a pullup resistor, or connect to ground if the I2C interface is not used."+      },+      {+        "number": "19",+        "name": "SGND",+        "type": "power_in",+        "description": "Signal ground."+      },+      {+        "number": "20",+        "name": "PGND_B0",+        "type": "power_in",+        "description": "Power ground for Buck 0."+      },+      {+        "number": "21",+        "name": "PGND_B0",+        "type": "power_in",+        "description": "Power ground for Buck 0."+      },+      {+        "number": "22",+        "name": "SW_B0",+        "type": "power_out",+        "description": "Buck 0 switch node; leave floating if Buck 0 is not used."+      },+      {+        "number": "23",+        "name": "SW_B0",+        "type": "power_out",+        "description": "Buck 0 switch node; leave floating if Buck 0 is not used."+      },+      {+        "number": "24",+        "name": "VIN_B0",+        "type": "power_in",+        "description": "Power input for Buck 0; VIN_Bx pins are not connected internally and must be connected together externally and locally bypassed."+      },+      {+        "number": "25",+        "name": "VIN_B0",+        "type": "power_in",+        "description": "Power input for Buck 0; VIN_Bx pins are not connected internally and must be connected together externally and locally bypassed."+      },+      {+        "number": "26",+        "name": "GPO",+        "type": "output",+        "description": "General-purpose digital output; leave the pin floating if not used."+      },+      {+        "number": "27",+        "name": "PGOOD",+        "type": "output",+        "description": "Power-good indication output; leave the pin floating if not used."+      },+      {+        "number": "28",+        "name": "VIN_LDO0",+        "type": "power_in",+        "description": "Power input for LDO0 (2.5 V to 5.5 V); connect to VANA if LDO0 is not used."+      },+      {+        "number": "29",+        "name": "EP",+        "type": "passive",+        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The exposed thermal pad is listed in Table 5-1 as 'Thermal Pad' with no pin number. It is connected ; The pinout comes from Table 5-1 and Figure 5-1 of the LP8732-Q1 family datasheet. The orderable adde; Pin types are mapped to KiCad classes from the datasheet's P/G/I/O/D/A codes. CLKIN (D/I/O) and SDA ",+          "exposed pad 29 added from the footprint"+        ],+        "pages_sent": 14,+        "cost_usd": 0.0998,+        "at": "2026-10-08T19:47:11"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602584955302264832",+        "pages": 86,+        "sha256": "8824bbdf846706b5",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 29,+        "described": 29,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "lp873248rhdrq1.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          5,+          5,+          0.92+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "e9d6d740f505b03e5aa0ac826330f9e269344b84656d051f50eb07ac162749eb",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "lp873248rhdrq1-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          5,+          5,+          0.92+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "88b2e229b737620ff6c8cc71f35cd178d8f5be7ca233c8074c61fdd6ff6a4df3",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file