component
LP311DR
Public Made by Adomby adom
Texas Instruments Comparators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# LP311DR++**Texas Instruments** · Comparators · SOIC-8++LP311DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | EMIT OUT | output | Emitter output, which can swing below the negative supply; voltage from emitter output to VCC− is rated at 30 V maximum. |+| 2 | IN+ | input | Non-inverting comparator input; with |VCC±| ≤ 15 V the input voltage must stay between VCC− + 0.5 V and VCC+ − 1.5 V, and the input voltage magnitude must never exceed ±15 V. |+| 3 | IN− | input | Inverting comparator input; with |VCC±| ≤ 15 V the input voltage must stay between VCC− + 0.5 V and VCC+ − 1.5 V, and the input voltage magnitude must never exceed ±15 V. |+| 4 | VCC− | power_in | Negative supply rail; the supply voltage VCC+ − VCC− is specified from 3.5 V to 30 V. |+| 5 | BALANCE | passive | Offset-balancing pin used with a trim network to minimize input offset voltage; if offset balancing is not used, it should be shorted to BAL/STRB. |+| 6 | BAL/STRB | input | Strobe input that turns the output off regardless of the inputs when pulled low; it must be current driven at 100 µA to 300 µA and must not be connected directly to ground. |+| 7 | COL OUT | output | Collector output with 25 mA drive capability; voltage from collector output to VCC− is rated at 40 V maximum. |+| 8 | VCC+ | power_in | Positive supply rail; the supply voltage VCC+ − VCC− is specified from 3.5 V to 30 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Amplifiers/Comparators |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `LP311DR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `lp311dr-etched.step` / `lp311dr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lp311dr.step` / `lp311dr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/lp311.pdf) (14 pp, sha256 `3c7d5a253861da53`, retrieved 2026-10-08, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lp311dr-datasheet.pdf)
page.jsonadded+200@@ -0,0 +1,200 @@+{+ "slug": "lp311dr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Comparators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "amplifiers-comparators",+ "lp311dr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "lp311dr.kicad_sym",+ "lp311dr.kicad_mod",+ "lp311dr.glb",+ "lp311dr.step",+ "lp311dr.lbr",+ "docs/hero.png",+ "docs/lp311dr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "lp311dr-hero.glb",+ "lp311dr-hero.overlay.json"+ ],+ "component": {+ "mpn": "LP311DR",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-8",+ "pin_count": 8,+ "category": "Amplifiers/Comparators",+ "subcategory": "Comparators",+ "datasheet": "https://www.ti.com/lit/ds/symlink/lp311.pdf",+ "parts": {+ "symbol": "lp311dr.kicad_sym",+ "footprint": "lp311dr.kicad_mod",+ "model_3d": "lp311dr-hero.glb",+ "model_3d_plain": "lp311dr.glb",+ "model_3d_step": "lp311dr-etched.step",+ "model_3d_step_plain": "lp311dr.step",+ "lbr": "lp311dr.lbr"+ },+ "distributor_links": {+ "lcsc": "C354102",+ "digikey": "296-14608-2-ND",+ "mouser": "595-LP311DR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T02:24:34Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-14608-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-LP311DR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "EMIT OUT",+ "type": "output",+ "description": "Emitter output, which can swing below the negative supply; voltage from emitter output to VCC− is rated at 30 V maximum."+ },+ {+ "number": "2",+ "name": "IN+",+ "type": "input",+ "description": "Non-inverting comparator input; with |VCC±| ≤ 15 V the input voltage must stay between VCC− + 0.5 V and VCC+ − 1.5 V, and the input voltage magnitude must never exceed ±15 V."+ },+ {+ "number": "3",+ "name": "IN−",+ "type": "input",+ "description": "Inverting comparator input; with |VCC±| ≤ 15 V the input voltage must stay between VCC− + 0.5 V and VCC+ − 1.5 V, and the input voltage magnitude must never exceed ±15 V."+ },+ {+ "number": "4",+ "name": "VCC−",+ "type": "power_in",+ "description": "Negative supply rail; the supply voltage VCC+ − VCC− is specified from 3.5 V to 30 V."+ },+ {+ "number": "5",+ "name": "BALANCE",+ "type": "passive",+ "description": "Offset-balancing pin used with a trim network to minimize input offset voltage; if offset balancing is not used, it should be shorted to BAL/STRB."+ },+ {+ "number": "6",+ "name": "BAL/STRB",+ "type": "input",+ "description": "Strobe input that turns the output off regardless of the inputs when pulled low; it must be current driven at 100 µA to 300 µA and must not be connected directly to ground."+ },+ {+ "number": "7",+ "name": "COL OUT",+ "type": "output",+ "description": "Collector output with 25 mA drive capability; voltage from collector output to VCC− is rated at 40 V maximum."+ },+ {+ "number": "8",+ "name": "VCC+",+ "type": "power_in",+ "description": "Positive supply rail; the supply voltage VCC+ − VCC− is specified from 3.5 V to 30 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet gives the SOIC-8 (D) pinout only as a top-view diagram where pin numbers and pin names; Pin types are KiCad ERC classes inferred from the function described in the text. BALANCE is typed p"+ ],+ "pages_sent": 14,+ "cost_usd": 0.0645,+ "at": "2026-10-08T02:24:18"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/lp311.pdf",+ "pages": 14,+ "sha256": "3c7d5a253861da53",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "lp311dr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "lp311dr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "eece0d88ce8a9d9c45296fb96b9d1967775bf60db8abc8f52b531e86cfea9269",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}