component
LMR51420YDDCR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+42@@ -0,0 +1,42 @@+# LMR51420YDDCR++**Texas Instruments** · DC-DC Converters · SOT-23-6++LMR51420YDDCR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | GND | power_in | Power ground terminal that connects to low-side FET source and system ground; shortest path to input capacitor ground required. |+| 2 | SW | output | Switching output (-0.3 to 38 V DC, -3.0 to 38 V transient) that connects to power inductor and high-side/low-side FET switch node. |+| 3 | VIN | power_in | Supply input terminal (4.5 to 36 V operating range) to internal bias LDO and high-side FET; connect input bypass capacitors directly to this pin and GND. |+| 4 | FB | input | Feedback input (0 to 4.5 V operating, -0.3 to 5.5 V absolute maximum) for resistor divider output voltage setting that must never be shorted to ground during operation. |+| 5 | EN | input | Precision enable input (1.1 to 1.36 V rising threshold, 0.95 to 1.22 V falling threshold) that controls ON/OFF operation; high = on, low = off; cannot be left floating. |+| 6 | CB | output | Bootstrap capacitor connection (-0.3 to 43.5 V absolute maximum, -0.3 to 5.5 V to SW) requiring 100-nF ceramic capacitor connection between this pin and SW pin for high-side FET gate drive. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOT-23-6 |+| Category | Power Management (PMIC) |+| Pins | 6 |++## CAD (KiCad official)++- Symbol: `LMR51420YDDCR`+- Footprint: `Package_TO_SOT_SMD:SOT-23-6`+- 3D model: SOT-23-6 (KiCad packages3D, STEP)+- 3D model files: `lmr51420yddcr-etched.step` / `lmr51420yddcr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lmr51420yddcr.step` / `lmr51420yddcr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903378513899520) (33 pp, sha256 `0ad3d2ef438f42ca`, retrieved 2026-09-22, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lmr51420yddcr-datasheet.pdf)
page.jsonadded+129@@ -0,0 +1,129 @@+{+ "slug": "lmr51420yddcr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, SOT-23-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "lmr51420yddcr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "lmr51420yddcr.kicad_sym",+ "lmr51420yddcr.kicad_mod",+ "lmr51420yddcr.glb",+ "lmr51420yddcr.step",+ "lmr51420yddcr.lbr",+ "docs/hero.png",+ "docs/lmr51420yddcr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "LMR51420YDDCR",+ "manufacturer": "Texas Instruments",+ "package": "SOT-23-6",+ "pin_count": 6,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903378513899520",+ "parts": {+ "symbol": "lmr51420yddcr.kicad_sym",+ "footprint": "lmr51420yddcr.kicad_mod",+ "model_3d": "lmr51420yddcr-etched.glb",+ "model_3d_plain": "lmr51420yddcr.glb",+ "model_3d_step": "lmr51420yddcr-etched.step",+ "model_3d_step_plain": "lmr51420yddcr.step",+ "lbr": "lmr51420yddcr.lbr"+ },+ "distributor_links": {+ "lcsc": "C5383002"+ },+ "pins": [+ {+ "number": "1",+ "name": "GND",+ "type": "power_in",+ "description": "Power ground terminal that connects to low-side FET source and system ground; shortest path to input capacitor ground required."+ },+ {+ "number": "2",+ "name": "SW",+ "type": "output",+ "description": "Switching output (-0.3 to 38 V DC, -3.0 to 38 V transient) that connects to power inductor and high-side/low-side FET switch node."+ },+ {+ "number": "3",+ "name": "VIN",+ "type": "power_in",+ "description": "Supply input terminal (4.5 to 36 V operating range) to internal bias LDO and high-side FET; connect input bypass capacitors directly to this pin and GND."+ },+ {+ "number": "4",+ "name": "FB",+ "type": "input",+ "description": "Feedback input (0 to 4.5 V operating, -0.3 to 5.5 V absolute maximum) for resistor divider output voltage setting that must never be shorted to ground during operation."+ },+ {+ "number": "5",+ "name": "EN",+ "type": "input",+ "description": "Precision enable input (1.1 to 1.36 V rising threshold, 0.95 to 1.22 V falling threshold) that controls ON/OFF operation; high = on, low = off; cannot be left floating."+ },+ {+ "number": "6",+ "name": "CB",+ "type": "output",+ "description": "Bootstrap capacitor connection (-0.3 to 43.5 V absolute maximum, -0.3 to 5.5 V to SW) requiring 100-nF ceramic capacitor connection between this pin and SW pin for high-side FET gate drive."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 33,+ "cost_usd": 0.3018,+ "at": "2026-09-22T18:28:50"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903378513899520",+ "pages": 33,+ "sha256": "0ad3d2ef438f42ca",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 6,+ "described": 6,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}