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Initial commit: component/lmr51420xddcr

Ray ·8d5d0cb382 ·1mo ago
2 files changed +171
README.mdadded+42
@@ -0,0 +1,42 @@+# LMR51420XDDCR++**Texas Instruments** · DC-DC Converters · SOT-23-6++LMR51420XDDCR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | GND | power_in | Power ground terminal connected to the low-side FET source; must be connected to system ground with the shortest possible path to the input bypass capacitor. |+| 2 | SW | power_out | Switching output node connected to the high-side FET source and low-side FET drain; connect this pin to the power inductor. |+| 3 | VIN | power_in | Supply input terminal for internal bias LDO and high-side FET; connect directly to input supply with input bypass capacitors. |+| 4 | FB | input | Feedback input for voltage regulation through external resistor divider; never short to ground during operation. |+| 5 | EN | input | Precision enable input for ON/OFF control with HIGH = on and LOW = off; cannot be left floating and allows adjustable UVLO through external resistor divider. |+| 6 | CB | power_out | Bootstrap capacitor connection for high-side FET gate driver; connect a 100-nF high-quality ceramic capacitor from this pin to the SW pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOT-23-6 |+| Category | Power Management (PMIC) |+| Pins | 6 |++## CAD (KiCad official)++- Symbol: `LMR51420XDDCR`+- Footprint: `Package_TO_SOT_SMD:SOT-23-6`+- 3D model: SOT-23-6 (KiCad packages3D, STEP)+- 3D model files: `lmr51420xddcr-etched.step` / `lmr51420xddcr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lmr51420xddcr.step` / `lmr51420xddcr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589836208961990656) (33 pp, sha256 `0ad3d2ef438f42ca`, retrieved 2026-09-23, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lmr51420xddcr-datasheet.pdf)
page.jsonadded+129
@@ -0,0 +1,129 @@+{+  "slug": "lmr51420xddcr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments DC-DC Converters, SOT-23-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "lmr51420xddcr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "lmr51420xddcr.kicad_sym",+    "lmr51420xddcr.kicad_mod",+    "lmr51420xddcr.glb",+    "lmr51420xddcr.step",+    "lmr51420xddcr.lbr",+    "docs/hero.png",+    "docs/lmr51420xddcr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "LMR51420XDDCR",+    "manufacturer": "Texas Instruments",+    "package": "SOT-23-6",+    "pin_count": 6,+    "category": "Power Management (PMIC)",+    "subcategory": "DC-DC Converters",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589836208961990656",+    "parts": {+      "symbol": "lmr51420xddcr.kicad_sym",+      "footprint": "lmr51420xddcr.kicad_mod",+      "model_3d": "lmr51420xddcr-etched.glb",+      "model_3d_plain": "lmr51420xddcr.glb",+      "model_3d_step": "lmr51420xddcr-etched.step",+      "model_3d_step_plain": "lmr51420xddcr.step",+      "lbr": "lmr51420xddcr.lbr"+    },+    "distributor_links": {+      "lcsc": "C5246146"+    },+    "pins": [+      {+        "number": "1",+        "name": "GND",+        "type": "power_in",+        "description": "Power ground terminal connected to the low-side FET source; must be connected to system ground with the shortest possible path to the input bypass capacitor."+      },+      {+        "number": "2",+        "name": "SW",+        "type": "power_out",+        "description": "Switching output node connected to the high-side FET source and low-side FET drain; connect this pin to the power inductor."+      },+      {+        "number": "3",+        "name": "VIN",+        "type": "power_in",+        "description": "Supply input terminal for internal bias LDO and high-side FET; connect directly to input supply with input bypass capacitors."+      },+      {+        "number": "4",+        "name": "FB",+        "type": "input",+        "description": "Feedback input for voltage regulation through external resistor divider; never short to ground during operation."+      },+      {+        "number": "5",+        "name": "EN",+        "type": "input",+        "description": "Precision enable input for ON/OFF control with HIGH = on and LOW = off; cannot be left floating and allows adjustable UVLO through external resistor divider."+      },+      {+        "number": "6",+        "name": "CB",+        "type": "power_out",+        "description": "Bootstrap capacitor connection for high-side FET gate driver; connect a 100-nF high-quality ceramic capacitor from this pin to the SW pin."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 33,+        "cost_usd": 0.3091,+        "at": "2026-09-23T11:55:34"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589836208961990656",+        "pages": 33,+        "sha256": "0ad3d2ef438f42ca",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 6,+        "described": 6,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file