component
LMR33630ADDA
Public Made by Adomby adom
Texas Instruments DC-DC Converters, ESOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
Publish 0.1.0
10 files changed
+5745
docs/hero.pngadded⋯ 1 unchanged line ⋯
docs/lmr33630adda-datasheet.pdfadded⋯ 1 unchanged line ⋯
lmr33630adda.glbadded⋯ 1 unchanged line ⋯
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lmr33630adda.lbradded+133@@ -0,0 +1,133 @@+<?xml version="1.0" encoding="utf-8"?>+<!DOCTYPE eagle SYSTEM "eagle.dtd">+<eagle version="9.6.2">+<drawing>+<settings><setting alwaysvectorfont="no"/></settings>+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>+<layers>+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>+<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/>+<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes"/>+<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/>+<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="yes"/>+<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/>+<layer number="28" name="bValues" color="7" fill="1" visible="yes" active="yes"/>+<layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes"/>+<layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes"/>+<layer number="31" name="tCream" color="7" fill="4" visible="no" active="yes"/>+<layer number="32" name="bCream" color="7" fill="5" visible="no" active="yes"/>+<layer number="33" name="tFinish" color="6" fill="3" visible="no" active="yes"/>+<layer number="34" name="bFinish" color="6" fill="6" visible="no" active="yes"/>+<layer number="35" name="tGlue" color="7" fill="4" visible="no" active="yes"/>+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="yes"/>+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="yes"/>+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="yes"/>+<layer number="39" name="tKeepout" color="4" fill="11" visible="no" active="yes"/>+<layer number="40" name="bKeepout" color="1" fill="11" visible="no" active="yes"/>+<layer number="41" name="tRestrict" color="4" fill="10" visible="no" active="yes"/>+<layer number="42" name="bRestrict" color="1" fill="10" visible="no" active="yes"/>+<layer number="43" name="vRestrict" color="2" fill="10" visible="no" active="yes"/>+<layer number="44" name="Drills" color="7" fill="1" visible="no" active="yes"/>+<layer number="45" name="Holes" color="7" fill="1" visible="no" active="yes"/>+<layer number="46" name="Milling" color="3" fill="1" visible="no" active="yes"/>+<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes"/>+<layer number="48" name="Document" color="7" fill="1" visible="yes" active="yes"/>+<layer number="49" name="Reference" color="7" fill="1" visible="yes" active="yes"/>+<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/>+<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/>+<layer number="93" name="Pins" color="2" fill="1" visible="no" active="yes"/>+<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes"/>+<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/>+<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/>+<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/>+<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/>+</layers>+<library>+<description></description>+<packages>+<package name="SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm">+ <description>SOIC-8-1EP, 3.9 x 4.9 mm, 1.27 mm pitch</description>+ <smd name="1" x="-2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1" roundness="50"/>+ <smd name="2" x="-2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1" roundness="50"/>+ <smd name="3" x="-2.4750" y="-0.6350" dx="1.9500" dy="0.6000" layer="1" roundness="50"/>+ <smd name="4" x="-2.4750" y="-1.9050" dx="1.9500" dy="0.6000" layer="1" roundness="50"/>+ <smd name="5" x="2.4750" y="-1.9050" dx="1.9500" dy="0.6000" layer="1" roundness="50"/>+ <smd name="6" x="2.4750" y="-0.6350" dx="1.9500" dy="0.6000" layer="1" roundness="50"/>+ <smd name="7" x="2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1" roundness="50"/>+ <smd name="8" x="2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1" roundness="50"/>+ <smd name="9" x="0.0000" y="-0.0000" dx="2.4100" dy="3.3000" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-2.6000" y="2.4700"/>+ <vertex x="-2.8400" y="2.8000"/>+ <vertex x="-2.3600" y="2.8000"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="-0.9750" y="2.4500"/>+ <vertex x="1.9500" y="2.4500"/>+ <vertex x="1.9500" y="-2.4500"/>+ <vertex x="-1.9500" y="-2.4500"/>+ <vertex x="-1.9500" y="1.4750"/>+ </polygon>+ <wire x1="-2.0600" y1="2.5600" x2="2.0600" y2="2.5600" width="0.1200" layer="21"/>+ <wire x1="-2.0600" y1="2.4650" x2="-2.0600" y2="2.5600" width="0.1200" layer="21"/>+ <wire x1="-2.0600" y1="-2.5600" x2="-2.0600" y2="-2.4650" width="0.1200" layer="21"/>+ <wire x1="2.0600" y1="2.5600" x2="2.0600" y2="2.4650" width="0.1200" layer="21"/>+ <wire x1="2.0600" y1="-2.4650" x2="2.0600" y2="-2.5600" width="0.1200" layer="21"/>+ <wire x1="2.0600" y1="-2.5600" x2="-2.0600" y2="-2.5600" width="0.1200" layer="21"/>+ <text x="0" y="3.480" size="1.27" layer="25" align="bottom-center">>NAME</text>+ <text x="0" y="-3.480" size="1.27" layer="27" align="top-center">>VALUE</text>+</package>+</packages>+<symbols>+<symbol name="LMR33630ADDA">+ <wire x1="-12.7" y1="7.62" x2="12.7" y2="7.62" width="0.254" layer="94"/>+ <wire x1="12.7" y1="7.62" x2="12.7" y2="-7.62" width="0.254" layer="94"/>+ <wire x1="12.7" y1="-7.62" x2="-12.7" y2="-7.62" width="0.254" layer="94"/>+ <wire x1="-12.7" y1="-7.62" x2="-12.7" y2="7.62" width="0.254" layer="94"/>+ <text x="0.0000" y="10.1600" size="1.27" layer="95" align="center">>NAME</text>+ <text x="0.0000" y="-10.1600" size="1.27" layer="96" align="center">>VALUE</text>+ <pin name="PGND" x="-17.78" y="5.08" length="middle" direction="pwr"/>+ <pin name="VIN" x="-17.78" y="2.54" length="middle" direction="pwr"/>+ <pin name="EN" x="-17.78" y="0" length="middle" direction="in"/>+ <pin name="PG" x="-17.78" y="-2.54" length="middle" direction="out"/>+ <pin name="FB" x="-17.78" y="-5.08" length="middle" direction="in"/>+ <pin name="EP" x="17.78" y="2.54" length="middle" direction="pas" rot="R180"/>+ <pin name="SW" x="17.78" y="0" length="middle" direction="out" rot="R180"/>+ <pin name="BOOT" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="VCC" x="17.78" y="-5.08" length="middle" direction="out" rot="R180"/>+</symbol>+</symbols>+<devicesets>+<deviceset name="LMR33630ADDA" prefix="U">+ <description></description>+ <gates>+ <gate name="G$1" symbol="LMR33630ADDA" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm">+ <connects>+ <connect gate="G$1" pin="PGND" pad="1"/>+ <connect gate="G$1" pin="VIN" pad="2"/>+ <connect gate="G$1" pin="EN" pad="3"/>+ <connect gate="G$1" pin="PG" pad="4"/>+ <connect gate="G$1" pin="FB" pad="5"/>+ <connect gate="G$1" pin="EP" pad="9"/>+ <connect gate="G$1" pin="SW" pad="8"/>+ <connect gate="G$1" pin="BOOT" pad="7"/>+ <connect gate="G$1" pin="VCC" pad="6"/>+ </connects>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+</devicesets>+</library>+</drawing>+</eagle>
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package.jsonadded+158@@ -0,0 +1,158 @@+{+ "slug": "lmr33630adda",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, ESOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "lmr33630adda",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "lmr33630adda.kicad_sym",+ "lmr33630adda.kicad_mod",+ "lmr33630adda.glb",+ "lmr33630adda.step",+ "lmr33630adda.lbr",+ "docs/hero.png",+ "docs/lmr33630adda-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "LMR33630ADDA",+ "manufacturer": "Texas Instruments",+ "package": "ESOP-8",+ "pin_count": 9,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/lmr33630",+ "parts": {+ "symbol": "lmr33630adda.kicad_sym",+ "footprint": "lmr33630adda.kicad_mod",+ "model_3d": "lmr33630adda-etched.glb",+ "model_3d_plain": "lmr33630adda.glb",+ "model_3d_step": "lmr33630adda-etched.step",+ "model_3d_step_plain": "lmr33630adda.step",+ "lbr": "lmr33630adda.lbr"+ },+ "distributor_links": {+ "lcsc": "C2866787",+ "digikey": "296-48844-ND",+ "mouser": "595-LMR33630ADDA"+ },+ "distributor_check": {+ "checked_at": "2026-09-26T21:54:06Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-48844-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-LMR33630ADDA",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground terminal; connect to system ground and AGND with bypass capacitor using short wide traces."+ },+ {+ "number": "2",+ "name": "VIN",+ "type": "power_in",+ "description": "Input voltage supply to regulator (3.8V to 36V); connect high-quality bypass capacitor or capacitors directly to this pin and PGND."+ },+ {+ "number": "3",+ "name": "EN",+ "type": "input",+ "description": "Enable input to regulator with rising threshold of 1.231V typical; high = ON, low = OFF; can connect directly to VIN but must not float."+ },+ {+ "number": "4",+ "name": "PG",+ "type": "output",+ "description": "Open-drain power-good flag output; connect to suitable voltage supply through current-limiting resistor; pulls low during current limit, thermal shutdown, or startup."+ },+ {+ "number": "5",+ "name": "FB",+ "type": "input",+ "description": "Feedback input for regulator with 1V reference (0.985V to 1.015V nominal); connect to feedback voltage divider tap; must not float or be grounded."+ },+ {+ "number": "6",+ "name": "VCC",+ "type": "power_out",+ "description": "Internal 5V LDO output (4.75V to 5.25V) supplying control circuits; connect 1-\u00b5F high-quality ceramic capacitor from this pin to GND; do not connect external loads."+ },+ {+ "number": "7",+ "name": "BOOT",+ "type": "power_in",+ "description": "Bootstrap supply voltage for internal high-side gate driver (-0.3V to 5.5V relative to SW); connect 100-nF high-quality ceramic capacitor from this pin to SW."+ },+ {+ "number": "8",+ "name": "SW",+ "type": "output",+ "description": "Regulator switch node connecting to power inductor; switches between VIN and ground through internal power MOSFETs at 400kHz switching frequency."+ },+ {+ "number": "9",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Thermal PAD AGND: HSOIC package includes an exposed thermal pad on the bottom serving as analog grou",+ "exposed pad 9 added from the footprint"+ ],+ "pages_sent": 57,+ "cost_usd": 0.4255,+ "at": "2026-09-26T21:53:50"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/lmr33630",+ "pages": 57,+ "sha256": "71bca20c1f8dd624",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 9,+ "described": 9,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ }+}
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