LMR14020SDDAR

@@ -0,0 +1,49 @@+# LMR14020SDDAR++**Texas Instruments** · DC-DC Converters · HSOP-8-EP++LMR14020SDDAR from Texas Instruments, in a HSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BOOT | passive | Bootstrap capacitor connection for the internal high-side MOSFET gate driver. Connect a high-quality 0.1 µF capacitor from BOOT to SW. Absolute max 49 V to GND, 6.5 V to SW. |+| 2 | VIN | power_in | Power supply input, 4 V to 40 V recommended operating range (44 V abs max). Connect to power supply and place high-frequency bypass capacitor CIN close to the VIN pin with short return to GND. |+| 3 | EN | input | Precision enable input with internal pull-up current source (~1 µA). Pull below 1.2 V (typ threshold) to disable; float or connect to VIN to enable. Can set programmable UVLO with a two-resistor divider from VIN. |+| 4 | RT/SYNC | bidirectional | Resistor timing or external clock synchronization input. In RT mode an external resistor to GND sets the switching frequency (200 kHz-2.5 MHz). When driven above the PLL upper threshold (~1.7 V) the pin auto-switches to SYNC mode and locks the internal PLL to the external clock (250 kHz-2.3 MHz). Max 3.6 V to GND. |+| 5 | FB | input | Feedback input pin. Connect to the output feedback divider to set VOUT; internal reference VFB = 0.750 V (typ). Do not short to ground during operation. Max 7 V to GND. |+| 6 | SS | passive | External soft-start control pin. Connect a capacitor from SS to GND to set the soft-start ramp time; internal charge current ISS ≈ 3 µA. |+| 7 | GND | power_in | System ground return pin. Must be tied to the PCB ground plane along with the thermal pad. |+| 8 | SW | power_out | Switching-node output; internally connected to the drain of the high-side power MOSFET. Connect to the power inductor and to the cathode of the external freewheeling (catch) diode. Rated -1 V to 40 V operating, -3 V to 44 V abs max. |+| 9 | Thermal Pad | power_in | Exposed thermal pad on the underside of the HSOIC-8 (DDA) package. Major heat-dissipation path of the die; must be soldered to the PCB ground plane for both thermal performance and electrical ground. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HSOP-8-EP |+| Category | PMIC |+| Pins | 9 |++## Ordering variants++- `LMR14020SDDARSDDA`+- `LMR14020SDDARSDDAR`++## CAD (KiCad official)++- Symbol: `LMR14020SDDAR`+- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm`+- 3D model: HSOP-8-EP (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/lmr14020sddar.pdf) (31 pp, sha256 `f7ba37ee6e000887`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lmr14020sddar-datasheet.pdf)

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