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Initial commit: component/lmk00338rtat

Ray ·f70c58a953 ·7h ago
2 files changed +437
README.mdadded+78
@@ -0,0 +1,78 @@+# LMK00338RTAT++**Texas Instruments** · Clock Buffers, Drivers · WQFN-40-EP(6x6)++LMK00338RTAT from Texas Instruments, in a WQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CLKoutA0 | output | Differential clock output A0 |+| 2 | CLKoutA0* | output | Differential clock output A0 |+| 3 | VCCOA | power_in | Power supply for Bank A Output buffers operating from 3.3 V or 2.5 V |+| 4 | CLKoutA1 | output | Differential clock output A1 |+| 5 | CLKoutA1* | output | Differential clock output A1 |+| 6 | VCCOA | power_in | Power supply for Bank A Output buffers operating from 3.3 V or 2.5 V |+| 7 | CLKoutA2 | output | Differential clock output A2 |+| 8 | CLKoutA2* | output | Differential clock output A2 |+| 9 | CLKoutA3 | output | Differential clock output A3 |+| 10 | CLKoutA3* | output | Differential clock output A3 |+| 11 | CLKoutA_EN | input | Bank A low active output buffer enable |+| 12 | VCC | power_in | Power supply for Core and Input buffer blocks operating at 3.3 V |+| 13 | OSCin | input | Input for crystal accepting 10 MHz to 40 MHz crystal or single-ended clock |+| 14 | OSCout | output | Output for crystal, leave floating if OSCin is driven by single-ended clock |+| 15 | CLKin_SEL0 | input | Clock input selection pin |+| 16 | CLKin0 | input | Universal clock input 0 (differential or single-ended) up to 400 MHz |+| 17 | CLKin0* | input | Universal clock input 0 (differential or single-ended) up to 400 MHz |+| 18 | CLKin_SEL1 | input | Clock input selection pin |+| 19 | CLKoutB_EN | input | Bank B low active output buffer enable |+| 20 | GND | power_in | Ground |+| 21 | CLKoutB3* | output | Differential clock output B3 |+| 22 | CLKoutB3 | output | Differential clock output B3 |+| 23 | CLKoutB2* | output | Differential clock output B2 |+| 24 | CLKoutB2 | output | Differential clock output B2 |+| 25 | VCCOB | power_in | Power supply for Bank B Output buffers operating from 3.3 V or 2.5 V |+| 26 | CLKoutB1* | output | Differential clock output B1 |+| 27 | CLKoutB1 | output | Differential clock output B1 |+| 28 | VCCOB | power_in | Power supply for Bank B Output buffers operating from 3.3 V or 2.5 V |+| 29 | CLKoutB0* | output | Differential clock output B0 |+| 30 | CLKoutB0 | output | Differential clock output B0 |+| 31 | GND | power_in | Ground |+| 32 | VCC | power_in | Power supply for Core and Input buffer blocks operating at 3.3 V |+| 33 | CLKin1* | input | Universal clock input 1 (differential or single-ended) up to 400 MHz |+| 34 | CLKin1 | input | Universal clock input 1 (differential or single-ended) up to 400 MHz |+| 35 | VCC | power_in | Power supply for Core and Input buffer blocks operating at 3.3 V |+| 36 | REFout | output | LVCMOS reference output |+| 37 | VCCOC | power_in | Power supply for REFout Output buffer operating from 3.3 V or 2.5 V |+| 38 | REFout_EN | input | REFout enable input with internal synchronization to selected clock input |+| 39 | VCC | power_in | Power supply for Core and Input buffer blocks operating at 3.3 V |+| 40 | GND | power_in | Ground |+| 41 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WQFN-40-EP(6x6) |+| Category | RTC/Clock Chip |+| Pins | 41 |++## CAD (KiCad official)++- Symbol: `LMK00338RTAT`+- Footprint: `Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm`+- 3D model: WQFN-40-EP(6x6) (KiCad packages3D, STEP)+- 3D model files: `lmk00338rtat-etched.step` / `lmk00338rtat-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lmk00338rtat.step` / `lmk00338rtat.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lmk00338) (34 pp, sha256 `89b6e86d2a67b80d`, retrieved 2026-10-05, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lmk00338rtat-datasheet.pdf)
page.jsonadded+359
@@ -0,0 +1,359 @@+{+  "slug": "lmk00338rtat",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Clock Buffers, Drivers, WQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "rtc-clock chip",+    "lmk00338rtat",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "lmk00338rtat.kicad_sym",+    "lmk00338rtat.kicad_mod",+    "lmk00338rtat.glb",+    "lmk00338rtat.step",+    "lmk00338rtat.lbr",+    "docs/hero.png",+    "docs/lmk00338rtat-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "lmk00338rtat-hero.glb",+    "lmk00338rtat-hero.overlay.json"+  ],+  "component": {+    "mpn": "LMK00338RTAT",+    "manufacturer": "Texas Instruments",+    "package": "WQFN-40-EP(6x6)",+    "pin_count": 41,+    "category": "RTC/Clock Chip",+    "subcategory": "Clock Buffers, Drivers",+    "datasheet": "https://www.ti.com/cn/lit/gpn/lmk00338",+    "parts": {+      "symbol": "lmk00338rtat.kicad_sym",+      "footprint": "lmk00338rtat.kicad_mod",+      "model_3d": "lmk00338rtat-hero.glb",+      "model_3d_plain": "lmk00338rtat.glb",+      "model_3d_step": "lmk00338rtat-etched.step",+      "model_3d_step_plain": "lmk00338rtat.step",+      "lbr": "lmk00338rtat.lbr"+    },+    "distributor_links": {+      "lcsc": 2651411,+      "digikey": "296-47794-2-ND",+      "mouser": "595-LMK00338RTAT"+    },+    "distributor_check": {+      "checked_at": "2026-10-05T23:57:05Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-47794-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-LMK00338RTAT",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "CLKoutA0",+        "type": "output",+        "description": "Differential clock output A0"+      },+      {+        "number": "2",+        "name": "CLKoutA0*",+        "type": "output",+        "description": "Differential clock output A0"+      },+      {+        "number": "3",+        "name": "VCCOA",+        "type": "power_in",+        "description": "Power supply for Bank A Output buffers operating from 3.3 V or 2.5 V"+      },+      {+        "number": "4",+        "name": "CLKoutA1",+        "type": "output",+        "description": "Differential clock output A1"+      },+      {+        "number": "5",+        "name": "CLKoutA1*",+        "type": "output",+        "description": "Differential clock output A1"+      },+      {+        "number": "6",+        "name": "VCCOA",+        "type": "power_in",+        "description": "Power supply for Bank A Output buffers operating from 3.3 V or 2.5 V"+      },+      {+        "number": "7",+        "name": "CLKoutA2",+        "type": "output",+        "description": "Differential clock output A2"+      },+      {+        "number": "8",+        "name": "CLKoutA2*",+        "type": "output",+        "description": "Differential clock output A2"+      },+      {+        "number": "9",+        "name": "CLKoutA3",+        "type": "output",+        "description": "Differential clock output A3"+      },+      {+        "number": "10",+        "name": "CLKoutA3*",+        "type": "output",+        "description": "Differential clock output A3"+      },+      {+        "number": "11",+        "name": "CLKoutA_EN",+        "type": "input",+        "description": "Bank A low active output buffer enable"+      },+      {+        "number": "12",+        "name": "VCC",+        "type": "power_in",+        "description": "Power supply for Core and Input buffer blocks operating at 3.3 V"+      },+      {+        "number": "13",+        "name": "OSCin",+        "type": "input",+        "description": "Input for crystal accepting 10 MHz to 40 MHz crystal or single-ended clock"+      },+      {+        "number": "14",+        "name": "OSCout",+        "type": "output",+        "description": "Output for crystal, leave floating if OSCin is driven by single-ended clock"+      },+      {+        "number": "15",+        "name": "CLKin_SEL0",+        "type": "input",+        "description": "Clock input selection pin"+      },+      {+        "number": "16",+        "name": "CLKin0",+        "type": "input",+        "description": "Universal clock input 0 (differential or single-ended) up to 400 MHz"+      },+      {+        "number": "17",+        "name": "CLKin0*",+        "type": "input",+        "description": "Universal clock input 0 (differential or single-ended) up to 400 MHz"+      },+      {+        "number": "18",+        "name": "CLKin_SEL1",+        "type": "input",+        "description": "Clock input selection pin"+      },+      {+        "number": "19",+        "name": "CLKoutB_EN",+        "type": "input",+        "description": "Bank B low active output buffer enable"+      },+      {+        "number": "20",+        "name": "GND",+        "type": "power_in",+        "description": "Ground"+      },+      {+        "number": "21",+        "name": "CLKoutB3*",+        "type": "output",+        "description": "Differential clock output B3"+      },+      {+        "number": "22",+        "name": "CLKoutB3",+        "type": "output",+        "description": "Differential clock output B3"+      },+      {+        "number": "23",+        "name": "CLKoutB2*",+        "type": "output",+        "description": "Differential clock output B2"+      },+      {+        "number": "24",+        "name": "CLKoutB2",+        "type": "output",+        "description": "Differential clock output B2"+      },+      {+        "number": "25",+        "name": "VCCOB",+        "type": "power_in",+        "description": "Power supply for Bank B Output buffers operating from 3.3 V or 2.5 V"+      },+      {+        "number": "26",+        "name": "CLKoutB1*",+        "type": "output",+        "description": "Differential clock output B1"+      },+      {+        "number": "27",+        "name": "CLKoutB1",+        "type": "output",+        "description": "Differential clock output B1"+      },+      {+        "number": "28",+        "name": "VCCOB",+        "type": "power_in",+        "description": "Power supply for Bank B Output buffers operating from 3.3 V or 2.5 V"+      },+      {+        "number": "29",+        "name": "CLKoutB0*",+        "type": "output",+        "description": "Differential clock output B0"+      },+      {+        "number": "30",+        "name": "CLKoutB0",+        "type": "output",+        "description": "Differential clock output B0"+      },+      {+        "number": "31",+        "name": "GND",+        "type": "power_in",+        "description": "Ground"+      },+      {+        "number": "32",+        "name": "VCC",+        "type": "power_in",+        "description": "Power supply for Core and Input buffer blocks operating at 3.3 V"+      },+      {+        "number": "33",+        "name": "CLKin1*",+        "type": "input",+        "description": "Universal clock input 1 (differential or single-ended) up to 400 MHz"+      },+      {+        "number": "34",+        "name": "CLKin1",+        "type": "input",+        "description": "Universal clock input 1 (differential or single-ended) up to 400 MHz"+      },+      {+        "number": "35",+        "name": "VCC",+        "type": "power_in",+        "description": "Power supply for Core and Input buffer blocks operating at 3.3 V"+      },+      {+        "number": "36",+        "name": "REFout",+        "type": "output",+        "description": "LVCMOS reference output"+      },+      {+        "number": "37",+        "name": "VCCOC",+        "type": "power_in",+        "description": "Power supply for REFout Output buffer operating from 3.3 V or 2.5 V"+      },+      {+        "number": "38",+        "name": "REFout_EN",+        "type": "input",+        "description": "REFout enable input with internal synchronization to selected clock input"+      },+      {+        "number": "39",+        "name": "VCC",+        "type": "power_in",+        "description": "Power supply for Core and Input buffer blocks operating at 3.3 V"+      },+      {+        "number": "40",+        "name": "GND",+        "type": "power_in",+        "description": "Ground"+      },+      {+        "number": "41",+        "name": "EP",+        "type": "passive",+        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "exposed pad 41 added from the footprint",+          "dropped thermal pad ['EP'] absent from footprint"+        ],+        "pages_sent": 8,+        "cost_usd": 0.1558,+        "at": "2026-10-05T23:56:48"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/lmk00338",+        "pages": 34,+        "sha256": "89b6e86d2a67b80d",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 41,+        "described": 41,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file