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LMH7324SQ
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Texas Instruments Comparators, WQFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+69@@ -0,0 +1,69 @@+# LMH7324SQ++**Texas Instruments** · Comparators · WQFN-32(5x5)++LMH7324SQ from Texas Instruments, in a WQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCCOA | power_in | Positive supply for output stage A, independent of the input stage supply, allowing output levels of different logic families. |+| 2 | ~{QA} | output | Inverted output A, with output levels determined by the choice of VCCOA. |+| 3 | QA | output | Output A, with output levels determined by the choice of VCCOA. |+| 4 | VEEA | power_in | Negative supply A; all four VEE pins are circular connected together via two antiparallel diodes. |+| 5 | VEEB | power_in | Negative supply B; all four VEE pins are circular connected together via two antiparallel diodes. |+| 6 | QB | output | Output B, with output levels determined by the choice of VCCOB. |+| 7 | ~{QB} | output | Inverted output B, with output levels determined by the choice of VCCOB. |+| 8 | VCCOB | power_in | Positive supply for output stage B, independent of the input stage supply, allowing output levels of different logic families. |+| 9 | VCCIB | power_in | Positive supply for input stage B, independent of the output stage supply; VCCI and VCCO share the same ground pin VEE. |+| 10 | INB- | input | Negative input B for analog voltages between 200 mV below VEE and 2V below VCCI. |+| 11 | INB+ | input | Positive input B for analog voltages between 200 mV below VEE and 2V below VCCI. |+| 12 | VEEB | power_in | Negative supply B; all four VEE pins are circular connected together via two antiparallel diodes. |+| 13 | VEEC | power_in | Negative supply C; all four VEE pins are circular connected together via two antiparallel diodes. |+| 14 | INC+ | input | Positive input C for analog voltages between 200 mV below VEE and 2V below VCCI. |+| 15 | INC- | input | Negative input C for analog voltages between 200 mV below VEE and 2V below VCCI. |+| 16 | VCCIC | power_in | Positive supply for input stage C, independent of the output stage supply; VCCI and VCCO share the same ground pin VEE. |+| 17 | VCCOC | power_in | Positive supply for output stage C, independent of the input stage supply, allowing output levels of different logic families. |+| 18 | ~{QC} | output | Inverted output C, with output levels determined by the choice of VCCOC. |+| 19 | QC | output | Output C, with output levels determined by the choice of VCCOC. |+| 20 | VEEC | power_in | Negative supply C; all four VEE pins are circular connected together via two antiparallel diodes. |+| 21 | VEED | power_in | Negative supply D; all four VEE pins are circular connected together via two antiparallel diodes. |+| 22 | QD | output | Output D, with output levels determined by the choice of VCCOD. |+| 23 | ~{QD} | output | Inverted output D, with output levels determined by the choice of VCCOD. |+| 24 | VCCOD | power_in | Positive supply for output stage D, independent of the input stage supply, allowing output levels of different logic families. |+| 25 | VCCID | power_in | Positive supply for input stage D, independent of the output stage supply; VCCI and VCCO share the same ground pin VEE. |+| 26 | IND- | input | Negative input D for analog voltages between 200 mV below VEE and 2V below VCCI. |+| 27 | IND+ | input | Positive input D for analog voltages between 200 mV below VEE and 2V below VCCI. |+| 28 | VEED | power_in | Negative supply D; all four VEE pins are circular connected together via two antiparallel diodes. |+| 29 | VEEA | power_in | Negative supply A; all four VEE pins are circular connected together via two antiparallel diodes. |+| 30 | INA+ | input | Positive input A for analog voltages between 200 mV below VEE and 2V below VCCI. |+| 31 | INA- | input | Negative input A for analog voltages between 200 mV below VEE and 2V below VCCI. |+| 32 | VCCIA | power_in | Positive supply for input stage A, independent of the output stage supply; VCCI and VCCO share the same ground pin VEE. |+| 33 | DAP | passive | Central pad at the bottom of the package that transfers heat out of the part; it is electrically isolated and may be connected to any voltage within the part's allowed range, commonly the lowest supply. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WQFN-32(5x5) |+| Category | Amplifiers/Comparators |+| Pins | 33 |++## CAD (KiCad official)++- Symbol: `LMH7324SQ`+- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`+- 3D model: WQFN-32(5x5) (KiCad packages3D, STEP)+- 3D model files: `lmh7324sq-etched.step` / `lmh7324sq-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lmh7324sq.step` / `lmh7324sq.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lmh7324) (32 pp, sha256 `0b1db4cc5a2f6630`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lmh7324sq-datasheet.pdf)
page.jsonadded+348@@ -0,0 +1,348 @@+{+ "slug": "lmh7324sq",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Comparators, WQFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "amplifiers-comparators",+ "lmh7324sq",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "lmh7324sq.kicad_sym",+ "lmh7324sq.kicad_mod",+ "lmh7324sq.glb",+ "lmh7324sq.step",+ "lmh7324sq.lbr",+ "docs/hero.png",+ "docs/lmh7324sq-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "lmh7324sq-hero.glb",+ "lmh7324sq-hero.overlay.json"+ ],+ "component": {+ "mpn": "LMH7324SQ",+ "manufacturer": "Texas Instruments",+ "package": "WQFN-32(5x5)",+ "pin_count": 33,+ "category": "Amplifiers/Comparators",+ "subcategory": "Comparators",+ "datasheet": "https://www.ti.com/cn/lit/gpn/lmh7324",+ "parts": {+ "symbol": "lmh7324sq.kicad_sym",+ "footprint": "lmh7324sq.kicad_mod",+ "model_3d": "lmh7324sq-hero.glb",+ "model_3d_plain": "lmh7324sq.glb",+ "model_3d_step": "lmh7324sq-etched.step",+ "model_3d_step_plain": "lmh7324sq.step",+ "lbr": "lmh7324sq.lbr"+ },+ "distributor_links": {+ "lcsc": "C2865186"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T19:39:21Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": null,+ "status": "no match"+ },+ "mouser": {+ "pn": null,+ "status": "no match"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VCCOA",+ "type": "power_in",+ "description": "Positive supply for output stage A, independent of the input stage supply, allowing output levels of different logic families."+ },+ {+ "number": "2",+ "name": "~{QA}",+ "type": "output",+ "description": "Inverted output A, with output levels determined by the choice of VCCOA."+ },+ {+ "number": "3",+ "name": "QA",+ "type": "output",+ "description": "Output A, with output levels determined by the choice of VCCOA."+ },+ {+ "number": "4",+ "name": "VEEA",+ "type": "power_in",+ "description": "Negative supply A; all four VEE pins are circular connected together via two antiparallel diodes."+ },+ {+ "number": "5",+ "name": "VEEB",+ "type": "power_in",+ "description": "Negative supply B; all four VEE pins are circular connected together via two antiparallel diodes."+ },+ {+ "number": "6",+ "name": "QB",+ "type": "output",+ "description": "Output B, with output levels determined by the choice of VCCOB."+ },+ {+ "number": "7",+ "name": "~{QB}",+ "type": "output",+ "description": "Inverted output B, with output levels determined by the choice of VCCOB."+ },+ {+ "number": "8",+ "name": "VCCOB",+ "type": "power_in",+ "description": "Positive supply for output stage B, independent of the input stage supply, allowing output levels of different logic families."+ },+ {+ "number": "9",+ "name": "VCCIB",+ "type": "power_in",+ "description": "Positive supply for input stage B, independent of the output stage supply; VCCI and VCCO share the same ground pin VEE."+ },+ {+ "number": "10",+ "name": "INB-",+ "type": "input",+ "description": "Negative input B for analog voltages between 200 mV below VEE and 2V below VCCI."+ },+ {+ "number": "11",+ "name": "INB+",+ "type": "input",+ "description": "Positive input B for analog voltages between 200 mV below VEE and 2V below VCCI."+ },+ {+ "number": "12",+ "name": "VEEB",+ "type": "power_in",+ "description": "Negative supply B; all four VEE pins are circular connected together via two antiparallel diodes."+ },+ {+ "number": "13",+ "name": "VEEC",+ "type": "power_in",+ "description": "Negative supply C; all four VEE pins are circular connected together via two antiparallel diodes."+ },+ {+ "number": "14",+ "name": "INC+",+ "type": "input",+ "description": "Positive input C for analog voltages between 200 mV below VEE and 2V below VCCI."+ },+ {+ "number": "15",+ "name": "INC-",+ "type": "input",+ "description": "Negative input C for analog voltages between 200 mV below VEE and 2V below VCCI."+ },+ {+ "number": "16",+ "name": "VCCIC",+ "type": "power_in",+ "description": "Positive supply for input stage C, independent of the output stage supply; VCCI and VCCO share the same ground pin VEE."+ },+ {+ "number": "17",+ "name": "VCCOC",+ "type": "power_in",+ "description": "Positive supply for output stage C, independent of the input stage supply, allowing output levels of different logic families."+ },+ {+ "number": "18",+ "name": "~{QC}",+ "type": "output",+ "description": "Inverted output C, with output levels determined by the choice of VCCOC."+ },+ {+ "number": "19",+ "name": "QC",+ "type": "output",+ "description": "Output C, with output levels determined by the choice of VCCOC."+ },+ {+ "number": "20",+ "name": "VEEC",+ "type": "power_in",+ "description": "Negative supply C; all four VEE pins are circular connected together via two antiparallel diodes."+ },+ {+ "number": "21",+ "name": "VEED",+ "type": "power_in",+ "description": "Negative supply D; all four VEE pins are circular connected together via two antiparallel diodes."+ },+ {+ "number": "22",+ "name": "QD",+ "type": "output",+ "description": "Output D, with output levels determined by the choice of VCCOD."+ },+ {+ "number": "23",+ "name": "~{QD}",+ "type": "output",+ "description": "Inverted output D, with output levels determined by the choice of VCCOD."+ },+ {+ "number": "24",+ "name": "VCCOD",+ "type": "power_in",+ "description": "Positive supply for output stage D, independent of the input stage supply, allowing output levels of different logic families."+ },+ {+ "number": "25",+ "name": "VCCID",+ "type": "power_in",+ "description": "Positive supply for input stage D, independent of the output stage supply; VCCI and VCCO share the same ground pin VEE."+ },+ {+ "number": "26",+ "name": "IND-",+ "type": "input",+ "description": "Negative input D for analog voltages between 200 mV below VEE and 2V below VCCI."+ },+ {+ "number": "27",+ "name": "IND+",+ "type": "input",+ "description": "Positive input D for analog voltages between 200 mV below VEE and 2V below VCCI."+ },+ {+ "number": "28",+ "name": "VEED",+ "type": "power_in",+ "description": "Negative supply D; all four VEE pins are circular connected together via two antiparallel diodes."+ },+ {+ "number": "29",+ "name": "VEEA",+ "type": "power_in",+ "description": "Negative supply A; all four VEE pins are circular connected together via two antiparallel diodes."+ },+ {+ "number": "30",+ "name": "INA+",+ "type": "input",+ "description": "Positive input A for analog voltages between 200 mV below VEE and 2V below VCCI."+ },+ {+ "number": "31",+ "name": "INA-",+ "type": "input",+ "description": "Negative input A for analog voltages between 200 mV below VEE and 2V below VCCI."+ },+ {+ "number": "32",+ "name": "VCCIA",+ "type": "power_in",+ "description": "Positive supply for input stage A, independent of the output stage supply; VCCI and VCCO share the same ground pin VEE."+ },+ {+ "number": "33",+ "name": "DAP",+ "type": "passive",+ "description": "Central pad at the bottom of the package that transfers heat out of the part; it is electrically isolated and may be connected to any voltage within the part's allowed range, commonly the lowest supply."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Overbars were lost in text extraction. The datasheet prints both complementary outputs as 'Q'. Pins ; The connection diagram (page 6, Figure 1) text is scrambled, so pin positions could not be checked a; The datasheet labels several VEE pins with the same or inconsistent letters (pins 4 and 29 are both ",+ "4/33 pins cited to the wrong page (name found elsewhere): ['3:QA@p12', '6:QB@p12', '19:QC@p12', '22:QD@p12']"+ ],+ "pages_sent": 11,+ "cost_usd": 0.0849,+ "at": "2026-10-08T19:38:44"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/lmh7324",+ "pages": 32,+ "sha256": "0b1db4cc5a2f6630",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 33,+ "described": 33,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "lmh7324sq.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 5,+ 5,+ 0.875+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "lmh7324sq-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 5,+ 5,+ 0.875+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "9cfb0f5d69d6406cc4c014d239b3d111f5529bffb64131896aa7ae00127fed19",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}