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Set visibility: public

Ray ·b2d8503eed ·6d ago ·parent 4761553
1 file changed +21−18
page.json+21−18
@@ -53,13 +53,13 @@         "number": "1",         "name": "SDI_IO+",         "type": "bidirectional",-        "description": "Single-ended complementary input or output with on-chip 75-\u03a9 termination; configurable as 75-\u03a9 adaptive cable equalizer input in EQ mode or 75-\u03a9 cable driver output in CD mode for SMPTE video up to 11.88 Gbps."+        "description": "Single-ended complementary input or output with on-chip 75-Ω termination; configurable as 75-Ω adaptive cable equalizer input in EQ mode or 75-Ω cable driver output in CD mode for SMPTE video up to 11.88 Gbps."       },       {         "number": "2",         "name": "SDI_IO-",         "type": "bidirectional",-        "description": "Single-ended complementary input or output with on-chip 75-\u03a9 termination; configurable as 75-\u03a9 adaptive cable equalizer input in EQ mode or 75-\u03a9 cable driver output in CD mode for SMPTE video up to 11.88 Gbps."+        "description": "Single-ended complementary input or output with on-chip 75-Ω termination; configurable as 75-Ω adaptive cable equalizer input in EQ mode or 75-Ω cable driver output in CD mode for SMPTE video up to 11.88 Gbps."       },       {         "number": "3",@@ -71,7 +71,7 @@         "number": "4",         "name": "OUT0_SEL",         "type": "input",-        "description": "Logic control enabling 100-\u03a9 host-side output driver at OUT0\u00b1; internally pulled high by default to disable OUT0."+        "description": "Logic control enabling 100-Ω host-side output driver at OUT0±; internally pulled high by default to disable OUT0."       },       {         "number": "5",@@ -89,19 +89,19 @@         "number": "7",         "name": "SDI_OUT-",         "type": "output",-        "description": "Single-ended complementary 75-\u03a9 output with on-chip termination and return loss network; used as loop-through output in EQ mode or secondary cable driver output in CD mode."+        "description": "Single-ended complementary 75-Ω output with on-chip termination and return loss network; used as loop-through output in EQ mode or secondary cable driver output in CD mode."       },       {         "number": "8",         "name": "SDI_OUT+",         "type": "output",-        "description": "Single-ended complementary 75-\u03a9 output with on-chip termination and return loss network; used as loop-through output in EQ mode or secondary cable driver output in CD mode."+        "description": "Single-ended complementary 75-Ω output with on-chip termination and return loss network; used as loop-through output in EQ mode or secondary cable driver output in CD mode."       },       {         "number": "9",         "name": "HOST_EQ0",         "type": "input",-        "description": "4-level control pin selecting output amplitude and de-emphasis for OUT0\u00b1 in EQ mode or equalizer boost setting for IN0\u00b1 in CD mode."+        "description": "4-level control pin selecting output amplitude and de-emphasis for OUT0± in EQ mode or equalizer boost setting for IN0± in CD mode."       },       {         "number": "10",@@ -119,7 +119,7 @@         "number": "12",         "name": "MODE_SEL",         "type": "input",-        "description": "4-level control pin selecting serial interface mode: SPI at Level F (float) or SMBus at Level L (1 k\u03a9 to VSS)."+        "description": "4-level control pin selecting serial interface mode: SPI at Level F (float) or SMBus at Level L (1 kΩ to VSS)."       },       {         "number": "13",@@ -131,7 +131,7 @@         "number": "14",         "name": "SDI_OUT_SEL",         "type": "input",-        "description": "Logic control enabling 75-\u03a9 output driver at SDI_OUT\u00b1; internally pulled high by default to disable SDI_OUT."+        "description": "Logic control enabling 75-Ω output driver at SDI_OUT±; internally pulled high by default to disable SDI_OUT."       },       {         "number": "15",@@ -155,13 +155,13 @@         "number": "18",         "name": "IN0-",         "type": "input",-        "description": "Differential input from host video processor with on-chip 100-\u03a9 differential termination; requires external 4.7-\u00b5F AC-coupling capacitors for SMPTE applications."+        "description": "Differential input from host video processor with on-chip 100-Ω differential termination; requires external 4.7-µF AC-coupling capacitors for SMPTE applications."       },       {         "number": "19",         "name": "IN0+",         "type": "input",-        "description": "Differential input from host video processor with on-chip 100-\u03a9 differential termination; requires external 4.7-\u00b5F AC-coupling capacitors for SMPTE applications."+        "description": "Differential input from host video processor with on-chip 100-Ω differential termination; requires external 4.7-µF AC-coupling capacitors for SMPTE applications."       },       {         "number": "20",@@ -173,25 +173,25 @@         "number": "21",         "name": "VDD_CDR",         "type": "power_in",-        "description": "2.5-V \u00b1 5% power supply for reclocker circuitry; connect to same supply as VIN with 0.1-\u00b5F bypass capacitor."+        "description": "2.5-V ± 5% power supply for reclocker circuitry; connect to same supply as VIN with 0.1-µF bypass capacitor."       },       {         "number": "22",         "name": "OUT0-",         "type": "output",-        "description": "Differential 100-\u03a9 output to host video processor with on-chip differential termination; requires external 4.7-\u00b5F AC-coupling capacitors for SMPTE applications."+        "description": "Differential 100-Ω output to host video processor with on-chip differential termination; requires external 4.7-µF AC-coupling capacitors for SMPTE applications."       },       {         "number": "23",         "name": "OUT0+",         "type": "output",-        "description": "Differential 100-\u03a9 output to host video processor with on-chip differential termination; requires external 4.7-\u00b5F AC-coupling capacitors for SMPTE applications."+        "description": "Differential 100-Ω output to host video processor with on-chip differential termination; requires external 4.7-µF AC-coupling capacitors for SMPTE applications."       },       {         "number": "24",         "name": "SDI_VOD",         "type": "input",-        "description": "4-level control pin selecting one of four output amplitudes (\u00b15% or nominal) for cable drivers at SDI_IO\u00b1 and SDI_OUT\u00b1."+        "description": "4-level control pin selecting one of four output amplitudes (±5% or nominal) for cable drivers at SDI_IO± and SDI_OUT±."       },       {         "number": "25",@@ -227,13 +227,13 @@         "number": "30",         "name": "VIN",         "type": "power_in",-        "description": "2.5-V \u00b1 5% external power supply with 10-\u00b5F and 1-\u00b5F bulk decoupling and 0.1-\u00b5F bypass capacitor."+        "description": "2.5-V ± 5% external power supply with 10-µF and 1-µF bulk decoupling and 0.1-µF bypass capacitor."       },       {         "number": "31",         "name": "VDD_LDO",         "type": "power_out",-        "description": "Internal 1.8-V LDO regulator output for powering internal circuitry only; requires 1-\u00b5F and 0.1-\u00b5F bypass capacitors to VSS."+        "description": "Internal 1.8-V LDO regulator output for powering internal circuitry only; requires 1-µF and 0.1-µF bypass capacitors to VSS."       },       {         "number": "32",@@ -245,7 +245,7 @@         "number": "EP",         "name": "Exposed Pad",         "type": "power_in",-        "description": "Thermal and ground connection at package bottom; connect to VSS plane through 3 \u00d7 3 via array for thermal performance and mechanical robustness."+        "description": "Thermal and ground connection at package bottom; connect to VSS plane through 3 × 3 via array for thermal performance and mechanical robustness."       }     ],     "provenance": {@@ -310,5 +310,8 @@     "docs/lmh1297rtvt-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file