LMH1218RTWR

@@ -0,0 +1,68 @@+# LMH1218RTWR++**Texas Instruments** · Video Interface ICs · WQFN-24-EP(4x4)++LMH1218RTWR from Texas Instruments, in a WQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | MODE_SEL | input | 4-level input that selects the device host interface. Tie to 1 kΩ→VDD to select SPI mode; other level codes select SMBus / address options (see Initialization Set Up). |+| 2 | IN_OUT_SEL_SPI_SS_N_ADR0 | input | In SPI mode this pin is SS_N, the SPI slave select input (has an internal pullup, 2-Level). In SMBus mode it is IN_OUT_SEL and ADR0, providing input/output selection and SMBus address bit 0. |+| 3 | EQ_SCL_SCK | input | In SPI mode this pin is SCK, the 2.5 V LVCMOS SPI serial clock input. In SMBus mode it is SCL, the SMBus clock, and it can also serve as an EQ strap. |+| 4 | OUT_CTRL_MOSI_SDA | bidirectional | In SPI mode this pin is MOSI, the 2-Level SPI master-output/slave-input data receive line. In SMBus mode it is SDA (SMBus data) / OUT_CTRL strap. |+| 5 | RESERVED | unconnected | Reserved. No Connect. |+| 6 | ENABLE | input | 4-Level enable input. 1 kΩ→VDD or Float(Default): power-down until valid signal detected. 20 kΩ→GND: Reserved. 1 kΩ→GND: full power-down including signal detects and register reset on power-up. |+| 7 | VDD | power_in | 2.5 V ±5% supply input for the device core and I/O. |+| 8 | IN1+ | input | Noninverting analog differential input of channel 1. On-chip 100 Ω terminating resistor connects IN1+ to IN1-; inputs require 4.7 µF AC-coupling capacitors. |+| 9 | IN1- | input | Inverting analog differential input of channel 1. On-chip 100 Ω terminating resistor connects IN1+ to IN1-; inputs require 4.7 µF AC-coupling capacitors. |+| 10 | VSS | power_in | Device ground return. |+| 11 | IN0+ | input | Noninverting analog differential input of channel 0. On-chip 100 Ω terminating resistor connects IN0+ to IN0-; inputs require 4.7 µF AC-coupling capacitors. |+| 12 | IN0- | input | Inverting analog differential input of channel 0. On-chip 100 Ω terminating resistor connects IN0+ to IN0-; inputs require 4.7 µF AC-coupling capacitors. |+| 13 | LOS_INT_N | output | LVCMOS open-drain, 2-Level programmable interrupt output. Asserts on change in Loss-of-Signal state or violation of the internal eye-monitor threshold. Requires an external 4.7 kΩ pullup; 3.3 V LVCMOS tolerant. |+| 14 | SMPTE_10GbE | unconnected | No Connect in SPI mode. In SMBus mode this pin functions as the SMPTE / 10GbE mode strap. |+| 15 | VOD_MISO_ADR1 | output | In SPI mode this pin is MISO, the 2.5 V LVCMOS 2-Level SPI master-input/slave-output data transmit line. In SMBus mode it serves as VOD strap and SMBus address bit 1. |+| 16 | LOCK | output | CDR lock-detect status output, 2.5 V LVCMOS 2-Level. High indicates CDR is locked; low indicates unlocked. |+| 17 | RESERVED | unconnected | Reserved. No Connect. |+| 18 | RESERVED | unconnected | Reserved. No Connect. |+| 19 | OUT0- | output | Inverting 75 Ω CML-compatible differential output of channel 0. On-chip 75 Ω terminating resistor connects OUT0+ and OUT0- to VDD; outputs require 4.7 µF AC-coupling capacitors. |+| 20 | OUT0+ | output | Noninverting 75 Ω CML-compatible differential output of channel 0. On-chip 75 Ω terminating resistor connects OUT0+ and OUT0- to VDD; outputs require 4.7 µF AC-coupling capacitors. |+| 21 | VDD | power_in | 2.5 V ±5% supply input. |+| 22 | OUT1- | output | Inverting analog differential output of channel 1. On-chip 100 Ω terminating resistor connects OUT1+ to OUT1-; outputs require 4.7 µF AC-coupling capacitors. |+| 23 | OUT1+ | output | Noninverting analog differential output of channel 1. On-chip 100 Ω terminating resistor connects OUT1+ to OUT1-; outputs require 4.7 µF AC-coupling capacitors. |+| 24 | VSS | power_in | Device ground return. |+| DAP | DAP | power_in | Exposed die-attach pad. Connect to GND with at least 5 vias (see package drawing) for electrical ground and thermal dissipation. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WQFN-24-EP(4x4) |+| Category | Interface |+| Pins | 25 |++## Ordering variants++Same part, different packaging or reel option.++- `LMH1218RTWR`+- `LMH1218RTWRRTWT`++## CAD (KiCad official)++- Symbol: `LMH1218RTWR`+- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm`+- 3D model: WQFN-24-EP(4x4) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lmh1218) (58 pp, sha256 `8819557a1c9f9747`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lmh1218rtwr-datasheet.pdf)

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