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Initial commit: component/lm51551qdsstq1

Ray ·99af63ab2d ·4d ago
2 files changed +236
README.mdadded+50
@@ -0,0 +1,50 @@+# LM51551QDSSTQ1++**Texas Instruments** · DC-DC Converters · WSON-12-EP(2x3)++LM51551QDSSTQ1 from Texas Instruments, in a WSON-12-EP(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BIAS | power_in | VCC regulator power supply voltage input (3.5V to 45V); connect bypass capacitor between this pin and PGND. |+| 2 | VCC | power_out | Internal VCC regulator output and MOSFET driver power supply voltage (6.85V typical); connect ceramic bypass capacitor to PGND. |+| 3 | GATE | output | N-channel MOSFET gate drive output (1.5A peak); connect via short low-inductance path directly to MOSFET gate. |+| 4 | PGND | power_in | Power ground pin; connect via wide short low-inductance path to current sense resistor ground connection. |+| 5 | CS | input | Current sense input pin; connect via short path to positive side of current sense resistor (100mV ±7% threshold). |+| 6 | COMP | output | Internal transconductance error amplifier output; connect loop compensation network (RCOMP, CCOMP) between this pin and PGND. |+| 7 | AGND | power_in | Analog ground pin; connect via wide short path to analog ground plane layer. |+| 8 | FB | input | Error amplifier inverting input; connect voltage divider from output to set 1.0V ±1% target voltage in boost/SEPIC topologies. |+| 9 | SS | input | Soft-start time programming pin; external capacitor and internal 10µA current source set soft-start ramp rate, ground to AGND. |+| 10 | RT | input | Switching frequency setting pin; program switching frequency from 100kHz to 2.2MHz via resistor between RT and AGND. |+| 11 | PGOOD | output | Power good indicator open-drain output; pulls low when FB below 87-93% of VREF, pull up to system voltage (max 1mA sink). |+| 12 | UVLO/SYNC | input | Undervoltage lockout and external clock sync input; connect via resistor divider to set startup/shutdown thresholds or apply sync pulses. |+| 13 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WSON-12-EP(2x3) |+| Category | Power Management (PMIC) |+| Pins | 13 |++## CAD (KiCad official)++- Symbol: `LM51551QDSSTQ1`+- Footprint: `Package_SON:WSON-12-1EP_3x2mm_P0.5mm_EP1x2.65`+- 3D model: WSON-12-EP(2x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.75 mm nominal WSON height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `lm51551qdsstq1-etched.step` / `lm51551qdsstq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm51551qdsstq1.step` / `lm51551qdsstq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm5155-q1) (50 pp, sha256 `a8503f9fa4bec785`, retrieved 2026-10-01, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lm51551qdsstq1-datasheet.pdf)
page.jsonadded+186
@@ -0,0 +1,186 @@+{+  "slug": "lm51551qdsstq1",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments DC-DC Converters, WSON-12-EP(2x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "lm51551qdsstq1",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "lm51551qdsstq1.kicad_sym",+    "lm51551qdsstq1.kicad_mod",+    "lm51551qdsstq1.glb",+    "lm51551qdsstq1.step",+    "lm51551qdsstq1.lbr",+    "docs/hero.png",+    "docs/lm51551qdsstq1-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "LM51551QDSSTQ1",+    "manufacturer": "Texas Instruments",+    "package": "WSON-12-EP(2x3)",+    "pin_count": 13,+    "category": "Power Management (PMIC)",+    "subcategory": "DC-DC Converters",+    "datasheet": "https://www.ti.com/cn/lit/gpn/lm5155-q1",+    "parts": {+      "symbol": "lm51551qdsstq1.kicad_sym",+      "footprint": "lm51551qdsstq1.kicad_mod",+      "model_3d": "lm51551qdsstq1-etched.glb",+      "model_3d_plain": "lm51551qdsstq1.glb",+      "model_3d_step": "lm51551qdsstq1-etched.step",+      "model_3d_step_plain": "lm51551qdsstq1.step",+      "lbr": "lm51551qdsstq1.lbr"+    },+    "distributor_links": {+      "lcsc": "C2871468",+      "digikey": "296-LM51551QDSSTQ1TR-ND",+      "mouser": "595-LM51551QDSSTQ1"+    },+    "distributor_check": {+      "checked_at": "2026-10-01T18:37:59Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-LM51551QDSSTQ1TR-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-LM51551QDSSTQ1",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "BIAS",+        "type": "power_in",+        "description": "VCC regulator power supply voltage input (3.5V to 45V); connect bypass capacitor between this pin and PGND."+      },+      {+        "number": "2",+        "name": "VCC",+        "type": "power_out",+        "description": "Internal VCC regulator output and MOSFET driver power supply voltage (6.85V typical); connect ceramic bypass capacitor to PGND."+      },+      {+        "number": "3",+        "name": "GATE",+        "type": "output",+        "description": "N-channel MOSFET gate drive output (1.5A peak); connect via short low-inductance path directly to MOSFET gate."+      },+      {+        "number": "4",+        "name": "PGND",+        "type": "power_in",+        "description": "Power ground pin; connect via wide short low-inductance path to current sense resistor ground connection."+      },+      {+        "number": "5",+        "name": "CS",+        "type": "input",+        "description": "Current sense input pin; connect via short path to positive side of current sense resistor (100mV ±7% threshold)."+      },+      {+        "number": "6",+        "name": "COMP",+        "type": "output",+        "description": "Internal transconductance error amplifier output; connect loop compensation network (RCOMP, CCOMP) between this pin and PGND."+      },+      {+        "number": "7",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog ground pin; connect via wide short path to analog ground plane layer."+      },+      {+        "number": "8",+        "name": "FB",+        "type": "input",+        "description": "Error amplifier inverting input; connect voltage divider from output to set 1.0V ±1% target voltage in boost/SEPIC topologies."+      },+      {+        "number": "9",+        "name": "SS",+        "type": "input",+        "description": "Soft-start time programming pin; external capacitor and internal 10µA current source set soft-start ramp rate, ground to AGND."+      },+      {+        "number": "10",+        "name": "RT",+        "type": "input",+        "description": "Switching frequency setting pin; program switching frequency from 100kHz to 2.2MHz via resistor between RT and AGND."+      },+      {+        "number": "11",+        "name": "PGOOD",+        "type": "output",+        "description": "Power good indicator open-drain output; pulls low when FB below 87-93% of VREF, pull up to system voltage (max 1mA sink)."+      },+      {+        "number": "12",+        "name": "UVLO/SYNC",+        "type": "input",+        "description": "Undervoltage lockout and external clock sync input; connect via resistor divider to set startup/shutdown thresholds or apply sync pulses."+      },+      {+        "number": "13",+        "name": "EP",+        "type": "passive",+        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 29,+        "cost_usd": 0.2574,+        "at": "2026-10-01T18:37:52"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/lm5155-q1",+        "pages": 50,+        "sha256": "a8503f9fa4bec785",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 13,+        "described": 13,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file