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LM5141RGER
Public Made by Adomby adom
Texas Instruments DC-DC Converters, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+62@@ -0,0 +1,62 @@+# LM5141RGER++**Texas Instruments** · DC-DC Converters · VQFN-24-EP(4x4)++LM5141RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DEMB | input | Diode emulation pin: connect to AGND to enable diode emulation, to VDDA for forced PWM with continuous conduction at light load, or use it as an external synchronization input. |+| 2 | VDDA | power_out | Internal analog bias regulator output; connect a capacitor from VDDA to AGND. |+| 3 | AGND | power_in | Analog ground return for the internal voltage reference and analog circuits. |+| 4 | RT | input | A resistor from RT to ground shifts the oscillator from 2.2 MHz (1.8 to 2.53 MHz) or 440 kHz (300 to 500 kHz), and an analog voltage applied through a resistor can also shift the frequency. |+| 5 | DITH | output | A capacitor to AGND is charged and discharged by a 20 µA source to dither the oscillator between -5% and +5%; connecting DITH to VDDA disables dithering, and it is ignored when an external sync clock is used. |+| 6 | OSC | input | Frequency select pin: connect to VDDA for 2.2 MHz or to AGND for 440 kHz. |+| 7 | LOL | output | Low-side gate driver turn-off output. |+| 8 | LO | output | Low-side gate driver turn-on output. |+| 9 | PGND | power_in | Power ground connection for the low-side NMOS gate driver. |+| 10 | VCC | power_out | VCC bias supply pin; connect a capacitor from VCC to PGND, with recommended VCC of up to 5.25 V (absolute maximum 6.5 V). |+| 11 | HB | power_out | High-side driver supply for bootstrap gate drive; recommended HB to SW is up to 5.25 V (absolute maximum 6.5 V). |+| 12 | SW | passive | Switching node of the buck regulator; connect to the bootstrap capacitor, the high-side MOSFET source and the low-side MOSFET drain. |+| 13 | HO | output | High-side gate driver turn-on output. |+| 14 | HOL | output | High-side gate driver turn-off output. |+| 15 | VIN | power_in | Supply voltage input for the VCC regulator; recommended input range is 3.8 V to 65 V (70 V absolute maximum). |+| 16 | VCCX | power_in | Optional external bias input: if VCCX is above 4.5 V it is connected internally to VCC and the internal VCC regulator is disabled; ground it if unused. |+| 17 | VOUT | input | Current sense amplifier input; connect to the output side of the current sense resistor. |+| 18 | CS | input | Current sense amplifier input; make a low-current Kelvin connection to the inductor side of the external current sense resistor. |+| 19 | FB | input | Connect to VDDA for a fixed 3.3 V output or to AGND for a fixed 5 V output; otherwise a divider sets 1.5 V to 15 V with a 1.2 V regulation threshold. |+| 20 | COMP | input | Output of the transconductance error amplifier. |+| 21 | PG | output | Open-collector output that switches low when VOUT is outside the power-good window. |+| 22 | SS | input | Soft-start programming pin: an external capacitor and internal 20 µA source set the reference ramp, and pulling SS below 80 mV turns off the gate driver outputs. |+| 23 | EN | input | Active-high logic input that enables the controller. |+| 24 | RES | output | Restart timer pin: an external capacitor sets the hiccup-mode off time, hiccup starts after 512 consecutive PWM cycles with cycle-by-cycle current limiting, and connecting RES to VDD at power-up disables hiccup protection. |+| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-24-EP(4x4) |+| Category | Power Management (PMIC) |+| Pins | 25 |++## CAD (KiCad official)++- Symbol: `LM5141RGER`+- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm`+- 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)+- 3D model files: `lm5141rger-etched.step` / `lm5141rger-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm5141rger.step` / `lm5141rger.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm5141) (53 pp, sha256 `7e612d227f860930`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lm5141rger-datasheet.pdf)
page.jsonadded+303@@ -0,0 +1,303 @@+{+ "slug": "lm5141rger",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "lm5141rger",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "lm5141rger.kicad_sym",+ "lm5141rger.kicad_mod",+ "lm5141rger.glb",+ "lm5141rger.step",+ "lm5141rger.lbr",+ "docs/hero.png",+ "docs/lm5141rger-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "lm5141rger-hero.glb",+ "lm5141rger-hero.overlay.json"+ ],+ "component": {+ "mpn": "LM5141RGER",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-24-EP(4x4)",+ "pin_count": 25,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/lm5141",+ "parts": {+ "symbol": "lm5141rger.kicad_sym",+ "footprint": "lm5141rger.kicad_mod",+ "model_3d": "lm5141rger-hero.glb",+ "model_3d_plain": "lm5141rger.glb",+ "model_3d_step": "lm5141rger-etched.step",+ "model_3d_step_plain": "lm5141rger.step",+ "lbr": "lm5141rger.lbr"+ },+ "distributor_links": {+ "lcsc": "C2658020",+ "digikey": "296-48147-2-ND",+ "mouser": "595-LM5141RGER"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T15:49:46Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-48147-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-LM5141RGER",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "DEMB",+ "type": "input",+ "description": "Diode emulation pin: connect to AGND to enable diode emulation, to VDDA for forced PWM with continuous conduction at light load, or use it as an external synchronization input."+ },+ {+ "number": "2",+ "name": "VDDA",+ "type": "power_out",+ "description": "Internal analog bias regulator output; connect a capacitor from VDDA to AGND."+ },+ {+ "number": "3",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground return for the internal voltage reference and analog circuits."+ },+ {+ "number": "4",+ "name": "RT",+ "type": "input",+ "description": "A resistor from RT to ground shifts the oscillator from 2.2 MHz (1.8 to 2.53 MHz) or 440 kHz (300 to 500 kHz), and an analog voltage applied through a resistor can also shift the frequency."+ },+ {+ "number": "5",+ "name": "DITH",+ "type": "output",+ "description": "A capacitor to AGND is charged and discharged by a 20 µA source to dither the oscillator between -5% and +5%; connecting DITH to VDDA disables dithering, and it is ignored when an external sync clock is used."+ },+ {+ "number": "6",+ "name": "OSC",+ "type": "input",+ "description": "Frequency select pin: connect to VDDA for 2.2 MHz or to AGND for 440 kHz."+ },+ {+ "number": "7",+ "name": "LOL",+ "type": "output",+ "description": "Low-side gate driver turn-off output."+ },+ {+ "number": "8",+ "name": "LO",+ "type": "output",+ "description": "Low-side gate driver turn-on output."+ },+ {+ "number": "9",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground connection for the low-side NMOS gate driver."+ },+ {+ "number": "10",+ "name": "VCC",+ "type": "power_out",+ "description": "VCC bias supply pin; connect a capacitor from VCC to PGND, with recommended VCC of up to 5.25 V (absolute maximum 6.5 V)."+ },+ {+ "number": "11",+ "name": "HB",+ "type": "power_out",+ "description": "High-side driver supply for bootstrap gate drive; recommended HB to SW is up to 5.25 V (absolute maximum 6.5 V)."+ },+ {+ "number": "12",+ "name": "SW",+ "type": "passive",+ "description": "Switching node of the buck regulator; connect to the bootstrap capacitor, the high-side MOSFET source and the low-side MOSFET drain."+ },+ {+ "number": "13",+ "name": "HO",+ "type": "output",+ "description": "High-side gate driver turn-on output."+ },+ {+ "number": "14",+ "name": "HOL",+ "type": "output",+ "description": "High-side gate driver turn-off output."+ },+ {+ "number": "15",+ "name": "VIN",+ "type": "power_in",+ "description": "Supply voltage input for the VCC regulator; recommended input range is 3.8 V to 65 V (70 V absolute maximum)."+ },+ {+ "number": "16",+ "name": "VCCX",+ "type": "power_in",+ "description": "Optional external bias input: if VCCX is above 4.5 V it is connected internally to VCC and the internal VCC regulator is disabled; ground it if unused."+ },+ {+ "number": "17",+ "name": "VOUT",+ "type": "input",+ "description": "Current sense amplifier input; connect to the output side of the current sense resistor."+ },+ {+ "number": "18",+ "name": "CS",+ "type": "input",+ "description": "Current sense amplifier input; make a low-current Kelvin connection to the inductor side of the external current sense resistor."+ },+ {+ "number": "19",+ "name": "FB",+ "type": "input",+ "description": "Connect to VDDA for a fixed 3.3 V output or to AGND for a fixed 5 V output; otherwise a divider sets 1.5 V to 15 V with a 1.2 V regulation threshold."+ },+ {+ "number": "20",+ "name": "COMP",+ "type": "input",+ "description": "Output of the transconductance error amplifier."+ },+ {+ "number": "21",+ "name": "PG",+ "type": "output",+ "description": "Open-collector output that switches low when VOUT is outside the power-good window."+ },+ {+ "number": "22",+ "name": "SS",+ "type": "input",+ "description": "Soft-start programming pin: an external capacitor and internal 20 µA source set the reference ramp, and pulling SS below 80 mV turns off the gate driver outputs."+ },+ {+ "number": "23",+ "name": "EN",+ "type": "input",+ "description": "Active-high logic input that enables the controller."+ },+ {+ "number": "24",+ "name": "RES",+ "type": "output",+ "description": "Restart timer pin: an external capacitor sets the hiccup-mode off time, hiccup starts after 512 consecutive PWM cycles with cycle-by-cycle current limiting, and connecting RES to VDD at power-up disables hiccup protection."+ },+ {+ "number": "25",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet pin table gives no number for the exposed thermal pad (only pins 1-24 are numbered). I; The pin table gives no type column entry for SW. Type 'passive' was chosen as a judgment call for th; The datasheet marks VDDA, VCC and HB as type P without specifying direction. They were mapped to pow",+ "exposed pad 25 added from the footprint"+ ],+ "pages_sent": 9,+ "cost_usd": 0.0675,+ "at": "2026-10-08T15:49:27"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/lm5141",+ "pages": 53,+ "sha256": "7e612d227f860930",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 25,+ "described": 25,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "lm5141rger.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4,+ 4,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "f7d256794c4147daf24dcae0554fae18510315e565ad1e239b475be7fef80d8b",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "lm5141rger-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4,+ 4,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "5944f776d1967b8eb2718b7473ec1661126968b6b6f63e7d217703e3979c29e9",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}