lm4861mx

@@ -33,5 +33,79 @@   "author": {     "name": "Ray",     "email": "[email protected]"+  },+  "component": {+    "mpn": "LM4861MX",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "Audio Power OpAmps",+    "datasheet": "https://www.ti.com/lit/ds/symlink/lm4861mx.pdf",+    "parts": {+      "symbol": "lm4861mx.kicad_sym",+      "footprint": "lm4861mx.kicad_mod",+      "model_3d": "lm4861mx-etched.glb",+      "model_3d_plain": "lm4861mx.glb",+      "model_3d_step": "lm4861mx-etched.step",+      "model_3d_step_plain": "lm4861mx.step",+      "lbr": "lm4861mx.lbr"+    },+    "pins": [+      {+        "number": "1",+        "name": "SHUTDOWN",+        "type": "input",+        "description": "Active-high shutdown control. Drive to VDD to disable the amplifier (typical shutdown current 0.6µA); drive to GND to enable. Must not be left floating - no internal pull-down exists. An external 47kΩ pull-up can be used with a switch to GND to enable."+      },+      {+        "number": "2",+        "name": "BYPASS",+        "type": "passive",+        "description": "Half-supply (VDD/2) internal reference bypass node. Connect an external bypass capacitor CB (typ 1.0µF) from this pin to GND to filter the half-supply reference; larger CB improves low-frequency THD+N."+      },+      {+        "number": "3",+        "name": "+IN",+        "type": "input",+        "description": "Non-inverting input of the first (gain-configurable) amplifier. Typically tied to the BYPASS (VDD/2) node through a resistor in bridged applications so the amplifier's input is biased at half-supply."+      },+      {+        "number": "4",+        "name": "-IN",+        "type": "input",+        "description": "Inverting input of the first amplifier. Closed-loop differential gain is set by Rf/Ri (Avd = 2·Rf/Ri); connect the audio input through a coupling capacitor Ci and series resistor Ri, with feedback resistor Rf from Vo1 to this pin."+      },+      {+        "number": "5",+        "name": "Vo1",+        "type": "output",+        "description": "Output of the first (gain-configurable) amplifier. One side of the bridge-tied load; biased at VDD/2. Drives the 8Ω load differentially with Vo2 (180° out of phase). Delivers up to 1.1W (1% THD+N) into 8Ω at VDD = 5V."+      },+      {+        "number": "6",+        "name": "VDD",+        "type": "power_in",+        "description": "Positive supply voltage input, 2.0V to 5.5V operating range (6.0V absolute maximum). Typical quiescent current 6.5mA. Bypass locally with a 0.1µF ceramic capacitor as close as possible to the pin for low-noise operation and high PSRR."+      },+      {+        "number": "7",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference return. All voltages are measured with respect to this pin."+      },+      {+        "number": "8",+        "name": "Vo2",+        "type": "output",+        "description": "Output of the second amplifier, internally fixed at unity gain in an inverting configuration (Av = -1) via two internal 40kΩ resistors. Forms the second half of the bridge-tied load with Vo1; biased at VDD/2 and 180° out of phase with Vo1. In single-ended use, load with a 0.1µF + 2kΩ dummy network for stability."+      }+    ],+    "provenance": {+      "rebuilt": "component block rebuilt 2026-10-05 from this page's own README pinout table and .kicad_sym (pins cross-checked), no re-extraction"+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }   }-}\ No newline at end of file+}