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Initial commit: component/lm27402mhx

Ray ·e00bb23161 ·16h ago
2 files changed +306
README.mdadded+54
@@ -0,0 +1,54 @@+# LM27402MHX++**Texas Instruments** · DC-DC Converters · HTSSOP-16-EP++LM27402MHX from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CS+ | input | Current sense positive input and noninverting input to the current-sense comparator. |+| 2 | CS- | input | Current sense negative input and inverting input to the current-sense comparator with 10-µA nominal offset current. |+| 3 | SS/TRACK | bidirectional | Soft-start or tracking input with +3-µA charging current for external capacitor; can be controlled by external voltage source; voltage must not exceed VDD. |+| 4 | FB | input | Feedback input and inverting input to the error amplifier for output voltage setting and control loop compensation. |+| 5 | COMP | output | Output of the internal error amplifier compared to internal ramp at PWM comparator to establish duty cycle command. |+| 6 | FADJ | input | Frequency adjust input; switching frequency programmable between 200 kHz and 1.2 MHz via external resistor to GND. |+| 7 | SYNC | input | Frequency synchronization input for external clock; frequency must exceed FADJ setting; must not exceed VDD and tie to GND if unused. |+| 8 | EN | input | Enable input; apply voltage above 1.17 V typically to enable switching when VIN and VDD exceed UVLO thresholds; 100 mV hysteresis; 2-µA pullup to VDD; must not exceed VDD. |+| 9 | PGOOD | tri_state | Open-drain power good monitor output goes low during overcurrent, short-circuit, UVLO, output overvoltage/undervoltage, overtemperature, or unregulated output; includes 20-μs deglitch filter; voltage should not exceed 5.5 V. |+| 10 | VIN | power_in | Input voltage supply rail with operating range 3 V to 20 V; provides feedforward modulation and internal bias supply generation; requires 1-μF ceramic capacitor to GND. |+| 11 | GND | power_in | Common ground connection providing power and signal return for analog functions, low-side MOSFET gate, soft-start capacitor, and frequency adjust resistor. |+| 12 | VDD | power_out | Internal sub-regulated 4.5-V bias supply for high-side MOSFET switching via CBOOT; 1-µF ceramic capacitor required to GND; cannot connect to separate rail; can connect to VIN only if VIN ≤ 5.5 V. |+| 13 | LG | output | Low-side MOSFET gate drive output. |+| 14 | SW | power_out | Power stage switch-node connection and return path for the high-side gate driver; switching node between high-side MOSFET and inductor. |+| 15 | HG | output | High-side MOSFET gate drive output. |+| 16 | CBOOT | power_out | High-side gate driver supply rail; requires 100-nF ceramic capacitor to SW and Schottky diode from VDD; provides gate drive voltage for high-side MOSFET. |+| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-16-EP |+| Category | Power Management (PMIC) |+| Pins | 17 |++## CAD (KiCad official)++- Symbol: `LM27402MHX`+- Footprint: `Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm`+- 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)+- 3D model files: `lm27402mhx-etched.step` / `lm27402mhx-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm27402mhx.step` / `lm27402mhx.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm27402) (54 pp, sha256 `603650c2a0683cad`, retrieved 2026-10-07, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lm27402mhx-datasheet.pdf)
page.jsonadded+252
@@ -0,0 +1,252 @@+{+  "slug": "lm27402mhx",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments DC-DC Converters, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "lm27402mhx",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "lm27402mhx.kicad_sym",+    "lm27402mhx.kicad_mod",+    "lm27402mhx.glb",+    "lm27402mhx.step",+    "lm27402mhx.lbr",+    "docs/hero.png",+    "docs/lm27402mhx-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "lm27402mhx-hero.glb",+    "lm27402mhx-hero.overlay.json"+  ],+  "component": {+    "mpn": "LM27402MHX",+    "manufacturer": "Texas Instruments",+    "package": "HTSSOP-16-EP",+    "pin_count": 17,+    "category": "Power Management (PMIC)",+    "subcategory": "DC-DC Converters",+    "datasheet": "https://www.ti.com/cn/lit/gpn/lm27402",+    "parts": {+      "symbol": "lm27402mhx.kicad_sym",+      "footprint": "lm27402mhx.kicad_mod",+      "model_3d": "lm27402mhx-hero.glb",+      "model_3d_plain": "lm27402mhx.glb",+      "model_3d_step": "lm27402mhx-etched.step",+      "model_3d_step_plain": "lm27402mhx.step",+      "lbr": "lm27402mhx.lbr"+    },+    "distributor_links": {+      "lcsc": "C2658435"+    },+    "distributor_check": {+      "checked_at": "2026-10-07T02:02:56Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": null,+        "status": "no match"+      },+      "mouser": {+        "pn": null,+        "status": "no match"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "CS+",+        "type": "input",+        "description": "Current sense positive input and noninverting input to the current-sense comparator."+      },+      {+        "number": "2",+        "name": "CS–",+        "type": "input",+        "description": "Current sense negative input and inverting input to the current-sense comparator with 10-µA nominal offset current."+      },+      {+        "number": "3",+        "name": "SS/TRACK",+        "type": "bidirectional",+        "description": "Soft-start or tracking input with +3-µA charging current for external capacitor; can be controlled by external voltage source; voltage must not exceed VDD."+      },+      {+        "number": "4",+        "name": "FB",+        "type": "input",+        "description": "Feedback input and inverting input to the error amplifier for output voltage setting and control loop compensation."+      },+      {+        "number": "5",+        "name": "COMP",+        "type": "output",+        "description": "Output of the internal error amplifier compared to internal ramp at PWM comparator to establish duty cycle command."+      },+      {+        "number": "6",+        "name": "FADJ",+        "type": "input",+        "description": "Frequency adjust input; switching frequency programmable between 200 kHz and 1.2 MHz via external resistor to GND."+      },+      {+        "number": "7",+        "name": "SYNC",+        "type": "input",+        "description": "Frequency synchronization input for external clock; frequency must exceed FADJ setting; must not exceed VDD and tie to GND if unused."+      },+      {+        "number": "8",+        "name": "EN",+        "type": "input",+        "description": "Enable input; apply voltage above 1.17 V typically to enable switching when VIN and VDD exceed UVLO thresholds; 100 mV hysteresis; 2-µA pullup to VDD; must not exceed VDD."+      },+      {+        "number": "9",+        "name": "PGOOD",+        "type": "tri_state",+        "description": "Open-drain power good monitor output goes low during overcurrent, short-circuit, UVLO, output overvoltage/undervoltage, overtemperature, or unregulated output; includes 20-μs deglitch filter; voltage should not exceed 5.5 V."+      },+      {+        "number": "10",+        "name": "VIN",+        "type": "power_in",+        "description": "Input voltage supply rail with operating range 3 V to 20 V; provides feedforward modulation and internal bias supply generation; requires 1-μF ceramic capacitor to GND."+      },+      {+        "number": "11",+        "name": "GND",+        "type": "power_in",+        "description": "Common ground connection providing power and signal return for analog functions, low-side MOSFET gate, soft-start capacitor, and frequency adjust resistor."+      },+      {+        "number": "12",+        "name": "VDD",+        "type": "power_out",+        "description": "Internal sub-regulated 4.5-V bias supply for high-side MOSFET switching via CBOOT; 1-µF ceramic capacitor required to GND; cannot connect to separate rail; can connect to VIN only if VIN ≤ 5.5 V."+      },+      {+        "number": "13",+        "name": "LG",+        "type": "output",+        "description": "Low-side MOSFET gate drive output."+      },+      {+        "number": "14",+        "name": "SW",+        "type": "power_out",+        "description": "Power stage switch-node connection and return path for the high-side gate driver; switching node between high-side MOSFET and inductor."+      },+      {+        "number": "15",+        "name": "HG",+        "type": "output",+        "description": "High-side MOSFET gate drive output."+      },+      {+        "number": "16",+        "name": "CBOOT",+        "type": "power_out",+        "description": "High-side gate driver supply rail; requires 100-nF ceramic capacitor to SW and Schottky diode from VDD; provides gate drive voltage for high-side MOSFET."+      },+      {+        "number": "17",+        "name": "EP",+        "type": "passive",+        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Exposed pad (EP) for thermal management is part of HTSSOP-16-EP package but is not assigned a number",+          "exposed pad 17 added from the footprint"+        ],+        "pages_sent": 8,+        "cost_usd": 0.1107,+        "at": "2026-10-07T02:02:40"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/lm27402",+        "pages": 54,+        "sha256": "603650c2a0683cad",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 17,+        "described": 17,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "lm27402mhx.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6.4,+          5,+          1.1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "7982746831c0bd23f4690608869ad67776faae5c762fb0376666126a3998921b",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "lm27402mhx-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6.4,+          5,+          1.1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "bab2f435a35f5e0c73f61623924533014ce91af0d4775a900df70321a69979d8",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file