component
LLL152D70G105ME01D
Public Made by Adomby adom
Murata Electronics Multilayer Ceramic Capacitors MLCC - SMD/SMT, 0204. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
lll152d70g105me01d: no pin-1 polarity bar on an unpolarised two-terminal land
2 files changed
−2
lll152d70g105me01d.kicad_mod−1@@ -15,7 +15,6 @@ (fp_line (start 0.68 -0.83) (end 0.68 0.83) (stroke (width 0.05) (type solid)) (layer "F.CrtYd")) (fp_line (start 0.68 0.83) (end -0.68 0.83) (stroke (width 0.05) (type solid)) (layer "F.CrtYd")) (fp_line (start -0.68 0.83) (end -0.68 -0.83) (stroke (width 0.05) (type solid)) (layer "F.CrtYd"))- (fp_line (start -0.825 -0.575) (end -0.825 0.575) (stroke (width 0.12) (type solid)) (layer "F.SilkS")) (pad "1" smd rect (at -0.2625 0) (size 0.325 1.15) (layers "F.Cu" "F.Paste" "F.Mask")) (pad "2" smd rect (at 0.2625 0) (size 0.325 1.15) (layers "F.Cu" "F.Paste" "F.Mask")) (model "${ADOM_GEN_3D}/Adom_Gen.3dshapes/Murata_Electronics_LLL152.step" (offset (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)))
lll152d70g105me01d.lbr−1@@ -60,7 +60,6 @@ <wire x1="0.2500" y1="0.5000" x2="0.2500" y2="-0.5000" width="0.1000" layer="51"/> <wire x1="0.2500" y1="-0.5000" x2="-0.2500" y2="-0.5000" width="0.1000" layer="51"/> <wire x1="-0.2500" y1="-0.5000" x2="-0.2500" y2="0.5000" width="0.1000" layer="51"/>- <wire x1="-0.8250" y1="0.5750" x2="-0.8250" y2="-0.5750" width="0.1200" layer="21"/> <text x="0" y="1.175" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-1.175" size="1.27" layer="27" align="top-center">>VALUE</text> </package>